Improve soc.svd output for eventmanager events

Right now no data is created for which bit means what in
the soc.svd file. Attempt to extend event manager finalization
to use "fields" instead of bit positions, so that the SVD
file can auto-generate the events correctly.
This commit is contained in:
bunnie 2020-11-15 16:33:14 +08:00
parent 9c0f687922
commit 6deb750d6e
1 changed files with 11 additions and 7 deletions

View File

@ -142,18 +142,22 @@ class EventManager(Module, AutoCSR):
sources_u = [v for k, v in xdir(self, True) if isinstance(v, _EventSource)] sources_u = [v for k, v in xdir(self, True) if isinstance(v, _EventSource)]
sources = sorted(sources_u, key=lambda x: x.duid) sources = sorted(sources_u, key=lambda x: x.duid)
n = len(sources) n = len(sources)
self.status = CSR(n)
self.pending = CSR(n) fields = []
self.enable = CSRStorage(n) for i, source in enumerate(sources):
fields += [CSRField(source.name, size=1, description="Mask bit for {}".format(str(source.name)))]
self.status = CSRStatus(n, fields=fields)
self.pending = CSRStatus(n, fields=fields)
self.enable = CSRStorage(n, fields=fields)
for i, source in enumerate(sources): for i, source in enumerate(sources):
self.comb += [ self.comb += [
self.status.w[i].eq(source.status), getattr(self.status.fields, source.name).eq(source.status),
If(self.pending.re & self.pending.r[i], source.clear.eq(1)), getattr(self.pending.fields, source.name).eq(source.pending),
self.pending.w[i].eq(source.pending) If(self.pending.re & getattr(self.pending.fields, source.name), source.clear.eq(1)),
] ]
irqs = [self.pending.w[i] & self.enable.storage[i] for i in range(n)] irqs = [self.pending.status[i] & self.enable.storage[i] for i in range(n)]
self.comb += self.irq.eq(reduce(or_, irqs)) self.comb += self.irq.eq(reduce(or_, irqs))
def __setattr__(self, name, value): def __setattr__(self, name, value):