Improve soc.svd output for eventmanager events
Right now no data is created for which bit means what in the soc.svd file. Attempt to extend event manager finalization to use "fields" instead of bit positions, so that the SVD file can auto-generate the events correctly.
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@ -142,18 +142,22 @@ class EventManager(Module, AutoCSR):
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sources_u = [v for k, v in xdir(self, True) if isinstance(v, _EventSource)]
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sources_u = [v for k, v in xdir(self, True) if isinstance(v, _EventSource)]
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sources = sorted(sources_u, key=lambda x: x.duid)
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sources = sorted(sources_u, key=lambda x: x.duid)
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n = len(sources)
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n = len(sources)
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self.status = CSR(n)
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self.pending = CSR(n)
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fields = []
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self.enable = CSRStorage(n)
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for i, source in enumerate(sources):
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fields += [CSRField(source.name, size=1, description="Mask bit for {}".format(str(source.name)))]
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self.status = CSRStatus(n, fields=fields)
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self.pending = CSRStatus(n, fields=fields)
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self.enable = CSRStorage(n, fields=fields)
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for i, source in enumerate(sources):
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for i, source in enumerate(sources):
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self.comb += [
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self.comb += [
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self.status.w[i].eq(source.status),
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getattr(self.status.fields, source.name).eq(source.status),
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If(self.pending.re & self.pending.r[i], source.clear.eq(1)),
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getattr(self.pending.fields, source.name).eq(source.pending),
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self.pending.w[i].eq(source.pending)
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If(self.pending.re & getattr(self.pending.fields, source.name), source.clear.eq(1)),
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]
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]
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irqs = [self.pending.w[i] & self.enable.storage[i] for i in range(n)]
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irqs = [self.pending.status[i] & self.enable.storage[i] for i in range(n)]
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self.comb += self.irq.eq(reduce(or_, irqs))
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self.comb += self.irq.eq(reduce(or_, irqs))
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def __setattr__(self, name, value):
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def __setattr__(self, name, value):
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