bios/sdram: rewrite write_leveling (simplify and improve robustness)
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975be6686f
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6e327cda26
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@ -225,12 +225,28 @@ void sdrwloff(void)
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ddrphy_wlevel_en_write(0);
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ddrphy_wlevel_en_write(0);
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}
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}
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static void write_level_scan(void)
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int write_level(void)
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{
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{
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int i, j;
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int i, j;
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int dq_address;
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int dq_address;
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unsigned char dq;
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unsigned char dq;
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int err_ddrphy_wdly;
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unsigned char taps_scan[ERR_DDRPHY_DELAY];
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int one_window_active;
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int one_window_start;
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int one_window_len;
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int best_one_window_len;
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int delays[DFII_PIX_DATA_SIZE/2];
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int ok;
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err_ddrphy_wdly = ERR_DDRPHY_DELAY - ddrphy_half_sys8x_taps_read();
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printf("Write leveling scan:\n");
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printf("Write leveling scan:\n");
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sdrwlon();
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sdrwlon();
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@ -238,94 +254,72 @@ static void write_level_scan(void)
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for(i=0;i<DFII_PIX_DATA_SIZE/2;i++) {
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for(i=0;i<DFII_PIX_DATA_SIZE/2;i++) {
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printf("m%d: ", i);
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printf("m%d: ", i);
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dq_address = sdram_dfii_pix_rddata_addr[0]+4*(DFII_PIX_DATA_SIZE/2-1-i);
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dq_address = sdram_dfii_pix_rddata_addr[0]+4*(DFII_PIX_DATA_SIZE/2-1-i);
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/* reset delay */
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ddrphy_dly_sel_write(1 << i);
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ddrphy_dly_sel_write(1 << i);
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ddrphy_wdly_dq_rst_write(1);
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ddrphy_wdly_dq_rst_write(1);
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ddrphy_wdly_dqs_rst_write(1);
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ddrphy_wdly_dqs_rst_write(1);
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for(j=0;j<ERR_DDRPHY_DELAY - ddrphy_half_sys8x_taps_read();j++) {
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#ifdef KUSDDRPHY /* need to init manually on Ultrascale */
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for(j=0; j<ddrphy_wdly_dqs_taps_read(); j++)
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ddrphy_wdly_dqs_inc_write(1);
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#endif
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/* scan taps */
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for(j=0;j<err_ddrphy_wdly;j++) {
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ddrphy_wlevel_strobe_write(1);
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ddrphy_wlevel_strobe_write(1);
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cdelay(10);
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cdelay(10);
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dq = MMPTR(dq_address);
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dq = MMPTR(dq_address);
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printf("%d", dq != 0);
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printf("%d", dq != 0);
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taps_scan[j] = (dq != 0);
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ddrphy_wdly_dq_inc_write(1);
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ddrphy_wdly_dq_inc_write(1);
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ddrphy_wdly_dqs_inc_write(1);
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ddrphy_wdly_dqs_inc_write(1);
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cdelay(10);
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cdelay(10);
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}
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}
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printf("\n");
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printf("\n");
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}
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sdrwloff();
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}
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static int write_level(int *delay, int *high_skew)
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/* find best delay */
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{
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one_window_active = 0;
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int i;
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one_window_start = 0;
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int dq_address;
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one_window_len = 0;
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unsigned char dq;
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best_one_window_len = 0;
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int err_ddrphy_wdly;
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delays[i] = -1;
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int ok;
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for(j=0;j<err_ddrphy_wdly;j++) {
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if (one_window_active) {
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if ((taps_scan[j] == 0) || (j == err_ddrphy_wdly-1)) {
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one_window_len = j - one_window_start;
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if (one_window_len > best_one_window_len) {
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delays[i] = one_window_start;
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best_one_window_len = one_window_len;
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}
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one_window_active = 0;
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}
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} else {
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if (taps_scan[j]) {
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one_window_active = 1;
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one_window_start = j;
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}
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}
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}
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err_ddrphy_wdly = ERR_DDRPHY_DELAY - ddrphy_half_sys8x_taps_read();
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/* configure delays */
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printf("Write leveling: ");
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sdrwlon();
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cdelay(100);
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for(i=0;i<DFII_PIX_DATA_SIZE/2;i++) {
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dq_address = sdram_dfii_pix_rddata_addr[0]+4*(DFII_PIX_DATA_SIZE/2-1-i);
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ddrphy_dly_sel_write(1 << i);
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ddrphy_wdly_dq_rst_write(1);
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ddrphy_wdly_dq_rst_write(1);
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ddrphy_wdly_dqs_rst_write(1);
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ddrphy_wdly_dqs_rst_write(1);
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#ifdef KUSDDRPHY /* Need to init manually on Ultrascale */
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#ifdef KUSDDRPHY /* need to init manually on Ultrascale */
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int j;
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for(j=0; j<ddrphy_wdly_dqs_taps_read(); j++)
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for(j=0; j<ddrphy_wdly_dqs_taps_read(); j++)
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ddrphy_wdly_dqs_inc_write(1);
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ddrphy_wdly_dqs_inc_write(1);
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#endif
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#endif
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for(j=0; j<delays[i]; j++) {
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delay[i] = 0;
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ddrphy_wlevel_strobe_write(1);
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cdelay(10);
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dq = MMPTR(dq_address);
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if(dq != 0) {
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/*
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* Assume this DQ group has between 1 and 2 bit times of skew.
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* Bring DQS into the CK=0 zone before continuing leveling.
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*/
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#ifndef DDRPHY_HIGH_SKEW_DISABLE
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high_skew[i] = 1;
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while(dq != 0) {
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delay[i]++;
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if(delay[i] >= err_ddrphy_wdly)
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break;
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ddrphy_wdly_dq_inc_write(1);
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ddrphy_wdly_dqs_inc_write(1);
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ddrphy_wlevel_strobe_write(1);
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cdelay(10);
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dq = MMPTR(dq_address);
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}
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#else
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high_skew[i] = 0;
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#endif
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} else
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high_skew[i] = 0;
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while(dq == 0) {
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delay[i]++;
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if(delay[i] >= err_ddrphy_wdly)
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break;
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ddrphy_wdly_dq_inc_write(1);
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ddrphy_wdly_dq_inc_write(1);
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ddrphy_wdly_dqs_inc_write(1);
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ddrphy_wdly_dqs_inc_write(1);
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ddrphy_wlevel_strobe_write(1);
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cdelay(10);
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dq = MMPTR(dq_address);
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}
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}
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}
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}
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sdrwloff();
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sdrwloff();
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ok = 1;
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ok = 1;
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printf("Write leveling: ");
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for(i=DFII_PIX_DATA_SIZE/2-1;i>=0;i--) {
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for(i=DFII_PIX_DATA_SIZE/2-1;i>=0;i--) {
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printf("%2d%c ", delay[i], high_skew[i] ? '*' : ' ');
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printf("%2d ", delays[i]);
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if(delay[i] >= err_ddrphy_wdly)
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if(delays[i] < 0)
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ok = 0;
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ok = 0;
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}
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}
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@ -352,28 +346,6 @@ static void read_bitslip_inc(char m)
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#endif
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#endif
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}
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}
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static void read_bitslip(int *delay, int *high_skew)
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{
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int bitslip_thr;
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int i;
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bitslip_thr = 0x7fffffff;
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for(i=0;i<DFII_PIX_DATA_SIZE/2;i++)
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if(high_skew[i] && (delay[i] < bitslip_thr))
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bitslip_thr = delay[i];
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if(bitslip_thr == 0x7fffffff)
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return;
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bitslip_thr = bitslip_thr/2;
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printf("Read bitslip: ");
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for(i=DFII_PIX_DATA_SIZE/2-1;i>=0;i--)
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if(delay[i] > bitslip_thr) {
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read_bitslip_inc(i);
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printf("%d ", i);
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}
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printf("\n");
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}
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static int read_level_scan(int silent)
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static int read_level_scan(int silent)
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{
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{
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unsigned int prv;
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unsigned int prv;
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@ -721,8 +693,6 @@ int memtest(void)
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#ifdef CSR_DDRPHY_BASE
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#ifdef CSR_DDRPHY_BASE
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int sdrlevel(int silent)
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int sdrlevel(int silent)
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{
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{
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int delay[DFII_PIX_DATA_SIZE/2];
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int high_skew[DFII_PIX_DATA_SIZE/2];
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int i, j;
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int i, j;
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int bitslip;
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int bitslip;
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int score;
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int score;
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@ -737,16 +707,11 @@ int sdrlevel(int silent)
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ddrphy_rdly_dq_bitslip_rst_write(1);
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ddrphy_rdly_dq_bitslip_rst_write(1);
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}
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}
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#ifndef CSR_DDRPHY_WLEVEL_EN_ADDR
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#ifdef CSR_DDRPHY_WLEVEL_EN_ADDR
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for(i=0; i<DFII_PIX_DATA_SIZE/2; i++) {
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if(!write_level())
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delay[i] = 0;
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high_skew[i] = 0;
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}
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#else
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write_level_scan();
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if(!write_level(delay, high_skew))
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return 0;
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return 0;
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#endif
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#endif
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/* scan possible read windows */
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/* scan possible read windows */
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best_score = 0;
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best_score = 0;
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best_bitslip = 0;
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best_bitslip = 0;
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@ -11,6 +11,12 @@ void sdrrd(char *startaddr, char *dq);
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void sdrrderr(char *count);
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void sdrrderr(char *count);
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void sdrwr(char *startaddr);
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void sdrwr(char *startaddr);
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#ifdef CSR_DDRPHY_WLEVEL_EN_ADDR
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void sdrwlon(void);
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void sdrwloff(void);
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int write_level(void);
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#endif
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#ifdef CSR_DDRPHY_BASE
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#ifdef CSR_DDRPHY_BASE
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void sdrwlon(void);
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void sdrwlon(void);
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void sdrwloff(void);
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void sdrwloff(void);
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