build/efinix/ifacewriter: bypass clks out frequency check for Trion when a feedback clock is used
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@ -370,6 +370,8 @@ design.create("{2}", "{3}", "./../gateware", overwrite=True)
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cmd += 'prop_map = design.get_property("{}", clock_source_prop, block_type="PLL")\n'.format(name)
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cmd += 'prop_map = design.get_property("{}", clock_source_prop, block_type="PLL")\n'.format(name)
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cmd += 'pprint.pprint(prop_map)\n'
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cmd += 'pprint.pprint(prop_map)\n'
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# Efinix python API is buggy for Trion devices when a feedback is defined...
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if block["version"] == "V3" or (block["version"] == "V1_V2" and block["feedback"] == -1):
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for i, clock in enumerate(block["clk_out"]):
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for i, clock in enumerate(block["clk_out"]):
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cmd += '\nfreq = float(prop_map["CLKOUT{}_FREQ"])\n'.format(i)
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cmd += '\nfreq = float(prop_map["CLKOUT{}_FREQ"])\n'.format(i)
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cmd += 'if freq != {}:\n'.format(clock[1]/1e6)
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cmd += 'if freq != {}:\n'.format(clock[1]/1e6)
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