ram/lattice_nx: Add init parameter and rename method to add_init.
When init is not empty, call add_init automatically (similar to Memory).
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@ -49,7 +49,7 @@ def initval_parameters(contents, width):
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class NXLRAM(Module):
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def __init__(self, width=32, size=128*kB):
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def __init__(self, width=32, size=128*kB, init=[]):
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self.bus = wishbone.Interface(width)
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assert width in [32, 64]
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self.width = width
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@ -100,7 +100,10 @@ class NXLRAM(Module):
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self.sync += self.bus.ack.eq(self.bus.stb & self.bus.cyc & ~self.bus.ack)
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def add_initial_value(self, data):
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if init != []:
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self.add_init(init)
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def add_init(self, data):
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# Pad it out to make slicing easier below.
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data += [0] * (self.size // self.width * 8 - len(data))
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for d in range(self.depth_cascading):
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