[fix] Trion T8 have a V1 PLL in BGA packages, but a V2 PLL in TQFP package. DP files varies accordingly
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@ -107,9 +107,9 @@ class EfinixDbParser:
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peri = root.findall('efxpt:periphery_instance', namespaces)
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peri = root.findall('efxpt:periphery_instance', namespaces)
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for p in peri:
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for p in peri:
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# T20/T120 have instance attribute in single_conn
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# T20/T120 have instance attribute in single_conn
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# not true for T4/T8 -> search in dependency subnode
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# not true for T4/T8 (except for TQFP144 package) -> search in dependency subnode
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if p.get('block') == 'pll':
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if p.get('block') == 'pll':
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if self.device[0:2] not in ['T4', 'T8']:
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if self.device[0:2] not in ['T4', 'T8'] or self.device[0:6] == "T8Q144":
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conn = p.findall('efxpt:single_conn', namespaces)
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conn = p.findall('efxpt:single_conn', namespaces)
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for c in conn:
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for c in conn:
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i = c.get('instance')
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i = c.get('instance')
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@ -289,7 +289,7 @@ design.create("{2}", "{3}", "./../gateware", overwrite=True)
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elif block["input_clock"] == "EXTERNAL":
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elif block["input_clock"] == "EXTERNAL":
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# PLL V1 has a different configuration
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# PLL V1 has a different configuration
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if partnumber[0:2] in ["T4", "T8"]:
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if partnumber[0:2] in ["T4", "T8"] and partnumber != "T8Q144":
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cmd += 'design.gen_pll_ref_clock("{}", pll_res="{}", refclk_res="{}", refclk_name="{}", ext_refclk_no="{}")\n\n' \
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cmd += 'design.gen_pll_ref_clock("{}", pll_res="{}", refclk_res="{}", refclk_name="{}", ext_refclk_no="{}")\n\n' \
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.format(name, block["resource"], block["input_clock_pad"], block["input_clock_name"], block["clock_no"])
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.format(name, block["resource"], block["input_clock_pad"], block["input_clock_name"], block["clock_no"])
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else:
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else:
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