build/generic_platform, generic_toolchain, yosys_nextpnr_wrapper: introduce the information about ability to do synthesis with mixed languages
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@ -323,6 +323,7 @@ class ConstraintManager:
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class GenericPlatform:
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def __init__(self, device, io, connectors=[], name=None):
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self.toolchain = None
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self.device = device
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self.constraint_manager = ConstraintManager(io, connectors)
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if name is None:
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@ -462,3 +463,7 @@ class GenericPlatform:
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def create_programmer(self):
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raise NotImplementedError
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@property
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def support_mixed_language(self):
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return self.toolchain.support_mixed_language
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@ -18,6 +18,7 @@ class GenericToolchain:
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}
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supported_build_backend = ["litex"]
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_support_mixed_language = True
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def __init__(self):
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self.clocks = dict()
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@ -27,6 +28,10 @@ class GenericToolchain:
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self._vns = None
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self._synth_opts = ""
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@property
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def support_mixed_language(self):
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return self._support_mixed_language
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def finalize(self):
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pass # Pass since optional.
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@ -57,10 +57,13 @@ class YosysNextPNRToolchain(GenericToolchain):
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target package (optional/target dependant)
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_speed_grade: str
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target speed grade (optional/target dependant)
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_support_mixed_language: bool
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informs if toolchain is able to use only verilog or verilog + vhdl
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"""
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attr_translate = {
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"keep": ("keep", "true"),
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}
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_support_mixed_language = False
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family = ""
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synth_fmt = ""
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