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bus/asmibus: fix typo
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1 changed files with 1 additions and 1 deletions
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@ -79,7 +79,7 @@ class Port:
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if not self.finalized:
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if not self.finalized:
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raise FinalizeError
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raise FinalizeError
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return self.call \
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return self.call \
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&& (self.tag_call == Constant(self.base + slotn, BV(self.tagbits)))
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& (self.tag_call == Constant(self.base + slotn, BV(self.tagbits)))
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def get_fragment(self):
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def get_fragment(self):
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if not self.finalized:
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if not self.finalized:
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