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fhdl/verilog: support special lowering and overrides
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parent
3a591c358c
commit
7c4e6c35e5
1 changed files with 29 additions and 4 deletions
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@ -208,10 +208,32 @@ def _printsync(f, ns, clock_domains):
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r += "end\n\n"
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return r
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def _printspecials(f, ns, clock_domains):
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def _call_special_classmethod(overrides, obj, method, *args, **kwargs):
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cl = obj.__class__
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if cl in overrides:
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cl = overrides[cl]
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if hasattr(cl, method):
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return getattr(cl, method)(obj, *args, **kwargs)
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else:
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return None
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def _lower_specials(overrides, specials):
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f = Fragment()
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lowered_specials = set()
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for special in sorted(specials, key=lambda x: x.huid):
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impl = _call_special_classmethod(overrides, special, "lower")
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if impl is not None:
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f += impl.get_fragment()
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lowered_specials.add(special)
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return f, lowered_specials
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def _printspecials(overrides, specials, ns, clock_domains):
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r = ""
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for special in sorted(f.specials, key=lambda x: x.huid):
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r += special.emit_verilog(special, ns, clock_domains)
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for special in sorted(specials, key=lambda x: x.huid):
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pr = _call_special_classmethod(overrides, special, "emit_verilog", ns, clock_domains)
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if pr is None:
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raise NotImplementedError("Special " + str(special) + " failed to implement emit_verilog")
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r += pr
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return r
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def _printinit(f, ios, ns):
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@ -230,6 +252,7 @@ def _printinit(f, ios, ns):
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def convert(f, ios=None, name="top",
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clock_domains=None,
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return_ns=False,
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special_overrides=dict(),
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display_run=False):
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if ios is None:
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ios = set()
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@ -242,6 +265,8 @@ def convert(f, ios=None, name="top",
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ios.add(cd.rst)
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f = lower_arrays(f)
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fs, lowered_specials = _lower_specials(special_overrides, f.specials)
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f += fs
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ns = build_namespace(list_signals(f) \
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| list_special_ios(f, True, True, True) \
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@ -251,7 +276,7 @@ def convert(f, ios=None, name="top",
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r += _printheader(f, ios, name, ns)
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r += _printcomb(f, ns, display_run)
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r += _printsync(f, ns, clock_domains)
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r += _printspecials(f, ns, clock_domains)
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r += _printspecials(special_overrides, f.specials - lowered_specials, ns, clock_domains)
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r += _printinit(f, ios, ns)
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r += "endmodule\n"
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