genlib/fsm: rename {entering,leaving} to after_{entering,leaving}, add before_{entering,leaving}
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@ -9,8 +9,10 @@ class Example(Module):
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self.submodules += myfsm
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myfsm.act("FOO", self.s.eq(1), NextState("BAR"))
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myfsm.act("BAR", self.s.eq(0), NextState("FOO"))
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self.entering_foo = myfsm.entering("FOO")
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self.leaving_bar = myfsm.leaving("BAR")
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self.be = myfsm.before_entering("FOO")
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self.ae = myfsm.after_entering("FOO")
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self.bl = myfsm.before_leaving("FOO")
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self.al = myfsm.after_leaving("FOO")
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example = Example()
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print(verilog.convert(example, {example.s, example.entering_foo, example.leaving_bar}))
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print(verilog.convert(example, {example.s, example.be, example.ae, example.bl, example.al}))
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@ -35,8 +35,10 @@ class FSM(Module):
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self.state_aliases = dict()
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self.reset_state = reset_state
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self.entering_signals = OrderedDict()
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self.leaving_signals = OrderedDict()
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self.before_entering_signals = OrderedDict()
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self.before_leaving_signals = OrderedDict()
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self.after_entering_signals = OrderedDict()
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self.after_leaving_signals = OrderedDict()
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def act(self, state, *statements):
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if self.finalized:
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@ -65,7 +67,7 @@ class FSM(Module):
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self.act(state, is_ongoing.eq(1))
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return is_ongoing
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def _entering_leaving(self, d, state):
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def _get_signal(self, d, state):
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if state not in self.actions:
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self.actions[state] = []
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try:
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@ -75,12 +77,22 @@ class FSM(Module):
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d[state] = is_el
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return is_el
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def entering(self, state):
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return self._entering_leaving(self.entering_signals, state)
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def before_entering(self, state):
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return self._get_signal(self.before_entering_signals, state)
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def before_leaving(self, state):
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return self._get_signal(self.before_leaving_signals, state)
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def after_entering(self, state):
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signal = self._get_signal(self.after_entering_signals, state)
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self.sync += signal.eq(self.before_entering(state))
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return signal
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def after_leaving(self, state):
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signal = self._get_signal(self.after_leaving_signals, state)
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self.sync += signal.eq(self.before_leaving(state))
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return signal
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def leaving(self, state):
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return self._entering_leaving(self.leaving_signals, state)
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def do_finalize(self):
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nstates = len(self.actions)
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if self.reset_state is None:
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@ -101,11 +113,11 @@ class FSM(Module):
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self.sync += self.state.eq(self.next_state)
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# drive entering/leaving signals
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for state, is_entering in self.entering_signals.items():
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for state, signal in self.before_leaving_signals.items():
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encoded = self.encoding[state]
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self.sync += is_entering.eq((self.next_state == encoded) & (self.state != encoded))
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if reset_state in self.entering_signals:
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self.entering_signals[reset_state].reset = 1
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for state, is_leaving in self.leaving_signals.items():
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self.comb += signal.eq((self.state == encoded) & ~(self.next_state == encoded))
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if reset_state in self.after_entering_signals:
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self.after_entering_signals[reset_state].reset = 1
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for state, signal in self.before_entering_signals.items():
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encoded = self.encoding[state]
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self.sync += is_leaving.eq((self.next_state != encoded) & (self.state == encoded))
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self.comb += signal.eq(~(self.state == encoded) & (self.next_state == encoded))
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