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soc/integration/soc/add_etherbone: adding ethernet mac address, local/remote ip as parameters, sanity check when hybrid mode and adding ip/mac constants

This commit is contained in:
Gwenhael Goavec-Merou 2024-02-07 11:21:49 +01:00
parent 177df0b57e
commit 7f211048ac
1 changed files with 10 additions and 0 deletions
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10
litex/soc/integration/soc.py
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@ -1809,6 +1809,9 @@ class LiteXSoC(SoC):
def add_etherbone(self, name="etherbone", phy=None, phy_cd="eth", data_width=8,
mac_address = 0x10e2d5000000,
ip_address = "192.168.1.50",
ethernet_mac_address = 0x10e2d5000001,
ethernet_local_ip = "192.168.1.51",
ethernet_remote_ip = "192.168.1.100",
arp_entries = 1,
udp_port = 1234,
buffer_depth = 16,
@ -1871,6 +1874,9 @@ class LiteXSoC(SoC):
# Ethernet MAC (CPU).
if with_ethmac:
assert mac_address != ethernet_mac_address
assert ip_address != ethernet_local_ip
self.check_if_exists("ethmac")
ethcore.autocsr_exclude = {"mac"}
# Software Interface.
@ -1884,6 +1890,10 @@ class LiteXSoC(SoC):
self.add_constant("ETH_PHY_NO_RESET") # Disable reset from BIOS to avoid disabling Hardware Interface.
add_ip_address_constants(self, "LOCALIP", ethernet_local_ip)
add_ip_address_constants(self, "REMOTEIP", ethernet_remote_ip)
add_mac_address_constants(self, "MACADDR", ethernet_mac_address)
# Add SPI Flash --------------------------------------------------------------------------------
def add_spi_flash(self, name="spiflash", mode="4x", clk_freq=20e6, module=None, phy=None, rate="1:1", software_debug=False, **kwargs):
# Imports.