software/libbase/isr.c: Generalize irq_table/attach/detach to all CPUS to have a common approach.
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@ -18,6 +18,33 @@ void isr(void);
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#ifdef CONFIG_CPU_HAS_INTERRUPT
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/*******************************************************/
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/* Common Interrupt Table for All CPUs. */
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/*******************************************************/
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struct irq_table
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{
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isr_t isr;
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} irq_table[CONFIG_CPU_INTERRUPTS];
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int irq_attach(unsigned int irq, isr_t isr)
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{
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if (irq >= CONFIG_CPU_INTERRUPTS) {
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printf("Inv irq %d\n", irq);
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return -1;
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}
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unsigned int ie = irq_getie();
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irq_setie(0);
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irq_table[irq].isr = isr;
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irq_setie(ie);
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return irq;
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}
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int irq_detach(unsigned int irq)
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{
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return irq_attach(irq, NULL);
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}
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/***********************************************************/
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/* ISR and PLIC Initialization for RISC-V PLIC-based CPUs. */
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/***********************************************************/
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@ -45,11 +72,10 @@ void isr(void)
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/* Claim and handle pending interrupts. */
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while ((claim = *((unsigned int *)PLIC_CLAIM))) {
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switch (claim - PLIC_EXT_IRQ_BASE) {
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case UART_INTERRUPT:
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uart_isr(); /* Handle UART interrupt. */
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break;
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default:
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unsigned int irq = claim - PLIC_EXT_IRQ_BASE;
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if (irq < CONFIG_CPU_INTERRUPTS && irq_table[irq].isr) {
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irq_table[irq].isr();
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} else {
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/* Unhandled interrupt source, print diagnostic information. */
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printf("## PLIC: Unhandled claim: %d\n", claim);
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printf("# plic_enabled: %08x\n", irq_getmask());
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@ -60,7 +86,6 @@ void isr(void)
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printf("# mie: %016lx\n", csrr(mie));
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printf("# mip: %016lx\n", csrr(mip));
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printf("###########################\n\n");
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break;
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}
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/* Acknowledge the interrupt. */
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*((unsigned int *)PLIC_CLAIM) = claim;
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@ -78,17 +103,19 @@ void isr(void)
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#define ECALL 11
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#define RISCV_TEST
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/* Interrupt Service Routine. */
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void isr(void)
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{
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unsigned int cause = csrr(mcause) & IRQ_MASK;
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if (csrr(mcause) & 0x80000000) {
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#ifndef UART_POLLING
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if (cause == (UART_INTERRUPT + FIRQ_OFFSET)) {
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uart_isr();
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/* Handle fast interrupts (FIRQ). */
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unsigned int irq = cause - FIRQ_OFFSET;
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if (irq < CONFIG_CPU_INTERRUPTS && irq_table[irq].isr) {
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irq_table[irq].isr();
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}
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#endif
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} else {
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/* Handle regular exceptions and system calls. */
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#ifdef RISCV_TEST
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int gp;
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asm volatile("mv %0, gp" : "=r"(gp));
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@ -110,6 +137,7 @@ void isr(void)
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/*************************************/
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#elif defined(__blackparrot__) /*TODO: Update this function for BP.*/
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/* Interrupt Service Routine. */
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void isr(void)
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{
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static int onetime = 0;
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@ -145,10 +173,16 @@ void isr(uint64_t vec)
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/* External interrupt. */
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irqs = irq_pending() & irq_getmask();
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#ifndef UART_POLLING
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if (irqs & (1 << UART_INTERRUPT))
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uart_isr();
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#endif
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if (irqs) {
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const unsigned int irq = __builtin_ctz(irqs);
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if (irq < CONFIG_CPU_INTERRUPTS && irq_table[irq].isr) {
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irq_table[irq].isr();
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} else {
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irq_setmask(irq_getmask() & ~(1 << irq));
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printf("\n*** disabled spurious irq %d ***\n", irq);
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}
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irqs &= irqs - 1; /* Clear this IRQ (the first bit set). */
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}
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}
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/* Clear interrupt. */
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@ -169,30 +203,6 @@ void isr_dec(void)
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/*******************************************************/
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#else
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struct irq_table
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{
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isr_t isr;
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} irq_table[CONFIG_CPU_INTERRUPTS];
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int irq_attach(unsigned int irq, isr_t isr)
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{
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if (irq >= CONFIG_CPU_INTERRUPTS) {
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printf("Inv irq %d\n", irq);
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return -1;
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}
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unsigned int ie = irq_getie();
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irq_setie(0);
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irq_table[irq].isr = isr;
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irq_setie(ie);
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return irq;
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}
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int irq_detach(unsigned int irq)
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{
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return irq_attach(irq, NULL);
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}
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/* Interrupt Service Routine. */
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void isr(void)
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{
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@ -220,3 +230,4 @@ void isr(void) {};
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#endif
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#endif
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