soc/cores/clock: add USIDELAYCTRL
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@ -385,6 +385,23 @@ class USMMCM(USClocking):
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self.params["o_CLKOUT{}".format(n)] = clk
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self.params["o_CLKOUT{}".format(n)] = clk
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self.specials += Instance("MMCME2_ADV", **self.params)
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self.specials += Instance("MMCME2_ADV", **self.params)
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class USIDELAYCTRL(Module):
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def __init__(self, cd):
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reset_counter = Signal(6, reset=63)
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ic_reset = Signal(reset=1)
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sync = getattr(self.sync, cd.name)
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sync += \
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If(reset_counter != 0,
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reset_counter.eq(reset_counter - 1)
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).Else(
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ic_reset.eq(0)
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)
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self.specials += Instance("IDELAYCTRL",
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p_SIM_DEVICE="ULTRASCALE",
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i_REFCLK=cd.clk,
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i_RST=ic_reset)
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# Lattice / ECP5
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# Lattice / ECP5
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# TODO:
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# TODO:
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