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Added `imac` config for CPUs which implements the most basic working riscv32imac feature set, implemented for VexRiscv

This commit is contained in:
Ilya Epifanov 2020-04-28 22:13:53 +02:00
parent 855d614e5d
commit 83f4dcb2c6
2 changed files with 5 additions and 0 deletions
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1
litex/soc/cores/cpu/__init__.py
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@ -61,6 +61,7 @@ CPU_VARIANTS = {
"minimal" : ["min",], "minimal" : ["min",],
"lite" : ["light", "zephyr", "nuttx"], "lite" : ["light", "zephyr", "nuttx"],
"standard": [None, "std"], "standard": [None, "std"],
"imac": [],
"full": [], "full": [],
"linux" : [], "linux" : [],
"linuxd" : [], "linuxd" : [],

4
litex/soc/cores/cpu/vexriscv/core.py
View File

@ -25,6 +25,8 @@ CPU_VARIANTS = {
"lite+debug": "VexRiscv_LiteDebug", "lite+debug": "VexRiscv_LiteDebug",
"standard": "VexRiscv", "standard": "VexRiscv",
"standard+debug": "VexRiscv_Debug", "standard+debug": "VexRiscv_Debug",
"imac": "VexRiscv_IMAC",
"imac+debug": "VexRiscv_IMACDebug",
"full": "VexRiscv_Full", "full": "VexRiscv_Full",
"full+debug": "VexRiscv_FullDebug", "full+debug": "VexRiscv_FullDebug",
"linux": "VexRiscv_Linux", "linux": "VexRiscv_Linux",
@ -47,6 +49,8 @@ GCC_FLAGS = {
"lite+debug": "-march=rv32i -mabi=ilp32", "lite+debug": "-march=rv32i -mabi=ilp32",
"standard": "-march=rv32im -mabi=ilp32", "standard": "-march=rv32im -mabi=ilp32",
"standard+debug": "-march=rv32im -mabi=ilp32", "standard+debug": "-march=rv32im -mabi=ilp32",
"imac": "-march=rv32imac -mabi=ilp32",
"imac+debug": "-march=rv32imac -mabi=ilp32",
"full": "-march=rv32im -mabi=ilp32", "full": "-march=rv32im -mabi=ilp32",
"full+debug": "-march=rv32im -mabi=ilp32", "full+debug": "-march=rv32im -mabi=ilp32",
"linux": "-march=rv32ima -mabi=ilp32", "linux": "-march=rv32ima -mabi=ilp32",