Merge pull request #1955 from Dolu1990/nax64_irq
cores/cpu/naxriscv: fix 64 bits IRQ support
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commit
882463d9db
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@ -12,6 +12,16 @@
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#define MSTATUS_FS_DIRTY (3 << 13)
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#define MSTATUS_FS_DIRTY (3 << 13)
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#define MSTATUS_FS_MASK (3 << 13)
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#define MSTATUS_FS_MASK (3 << 13)
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#if __riscv_xlen == 64
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#define STORE sd
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#define LOAD ld
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#define WORD 8
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#else
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#define STORE sw
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#define LOAD lw
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#define WORD 4
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#endif
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_start:
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_start:
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j crt_init
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j crt_init
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nop
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nop
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@ -24,41 +34,41 @@ _start:
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.global trap_entry
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.global trap_entry
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trap_entry:
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trap_entry:
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sw x1, - 1*4(sp)
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STORE x1, - 1*WORD(sp)
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sw x5, - 2*4(sp)
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STORE x5, - 2*WORD(sp)
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sw x6, - 3*4(sp)
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STORE x6, - 3*WORD(sp)
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sw x7, - 4*4(sp)
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STORE x7, - 4*WORD(sp)
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sw x10, - 5*4(sp)
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STORE x10, - 5*WORD(sp)
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sw x11, - 6*4(sp)
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STORE x11, - 6*WORD(sp)
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sw x12, - 7*4(sp)
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STORE x12, - 7*WORD(sp)
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sw x13, - 8*4(sp)
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STORE x13, - 8*WORD(sp)
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sw x14, - 9*4(sp)
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STORE x14, - 9*WORD(sp)
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sw x15, -10*4(sp)
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STORE x15, -10*WORD(sp)
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sw x16, -11*4(sp)
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STORE x16, -11*WORD(sp)
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sw x17, -12*4(sp)
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STORE x17, -12*WORD(sp)
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sw x28, -13*4(sp)
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STORE x28, -13*WORD(sp)
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sw x29, -14*4(sp)
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STORE x29, -14*WORD(sp)
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sw x30, -15*4(sp)
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STORE x30, -15*WORD(sp)
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sw x31, -16*4(sp)
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STORE x31, -16*WORD(sp)
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addi sp,sp,-16*4
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addi sp,sp,-16*WORD
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call isr
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call isr
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lw x1 , 15*4(sp)
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LOAD x1 , 15*WORD(sp)
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lw x5, 14*4(sp)
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LOAD x5, 14*WORD(sp)
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lw x6, 13*4(sp)
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LOAD x6, 13*WORD(sp)
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lw x7, 12*4(sp)
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LOAD x7, 12*WORD(sp)
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lw x10, 11*4(sp)
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LOAD x10, 11*WORD(sp)
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lw x11, 10*4(sp)
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LOAD x11, 10*WORD(sp)
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lw x12, 9*4(sp)
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LOAD x12, 9*WORD(sp)
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lw x13, 8*4(sp)
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LOAD x13, 8*WORD(sp)
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lw x14, 7*4(sp)
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LOAD x14, 7*WORD(sp)
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lw x15, 6*4(sp)
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LOAD x15, 6*WORD(sp)
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lw x16, 5*4(sp)
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LOAD x16, 5*WORD(sp)
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lw x17, 4*4(sp)
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LOAD x17, 4*WORD(sp)
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lw x28, 3*4(sp)
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LOAD x28, 3*WORD(sp)
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lw x29, 2*4(sp)
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LOAD x29, 2*WORD(sp)
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lw x30, 1*4(sp)
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LOAD x30, 1*WORD(sp)
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lw x31, 0*4(sp)
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LOAD x31, 0*WORD(sp)
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addi sp,sp,16*4
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addi sp,sp,16*WORD
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mret
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mret
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.text
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.text
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