xilinx_ise: cleanup
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9d531ba06a
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88611be368
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@ -104,24 +104,25 @@ def _run_ise(build_name, ise_path, source, mode="verilog"):
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tools_version = max(vers)
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bits = struct.calcsize("P")*8
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xilinx_settings_file = '%s/%s/ISE_DS/settings%d.sh' % (ise_path, tools_version, bits)
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xilinx_settings_file = os.path.join(ise_path, tools_version, "ISE_DS", "settings{0}.sh".format(bits))
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if not os.path.exists(xilinx_settings_file) and bits == 64:
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# if we are on 64-bit system but the toolchain isn't, try the 32-bit env.
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xilinx_settings_file = '%s/%s/ISE_DS/settings%d.sh' % (ise_path, tools_version, 32)
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xilinx_settings_file = os.path.join(ise_path, tools_version, "ISE_DS", "settings32.sh")
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build_script_contents += "source " + xilinx_settings_file + "\n"
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if mode == "edif":
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build_script_contents += """
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ngdbuild -uc {build_name}.ucf {build_name}.edif {build_name}.ngd""".format(build_name=build_name)
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ngdbuild -uc {build_name}.ucf {build_name}.edif {build_name}.ngd"""
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else:
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build_script_contents += """
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xst -ifn {build_name}.xst
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ngdbuild -uc {build_name}.ucf {build_name}.ngc {build_name}.ngd""".format(build_name=build_name)
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ngdbuild -uc {build_name}.ucf {build_name}.ngc {build_name}.ngd"""
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build_script_contents += """
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map -ol high -w -o {build_name}_map.ncd {build_name}.ngd {build_name}.pcf
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par -ol high -w {build_name}_map.ncd {build_name}.ncd {build_name}.pcf
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bitgen -g LCK_cycle:6 -g Binary:Yes -w {build_name}.ncd {build_name}.bit
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""".format(build_name=build_name)
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"""
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build_script_contents = build_script_contents.format(build_name=build_name)
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build_script_file = "build_" + build_name + ".sh"
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tools.write_to_file(build_script_file, build_script_contents)
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