Hardware/litex
1
0
Fork 0
mirror of https://github.com/enjoy-digital/litex.git synced 2025-01-04 09:52:26 -05:00
Code Issues Projects Releases Packages Wiki Activity

Merge pull request #640 from antmicro/mor1kx_dt

Browse source 
litex_json2dts: Add support for mor1kx
This commit is contained in:
enjoy-digital 2020-08-24 14:26:11 +02:00 committed by GitHub
commit 8a44464a45
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
1 changed files with 61 additions and 33 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

40
litex/tools/litex_json2dts.py
View file

@ -17,6 +17,8 @@ def generate_dts(d):
kB = 1024 kB = 1024
mB = kB*1024 mB = kB*1024
cpu_name = d["constants"]["config_cpu_human_name"]
aliases = {} aliases = {}
# Header ------------------------------------------------------------------------------------------- # Header -------------------------------------------------------------------------------------------
@ -27,8 +29,6 @@ def generate_dts(d):
/ { / {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "enjoy-digital,litex-vexriscv-soclinux";
model = "VexRiscv SoCLinux";
""" """
@ -48,6 +48,8 @@ def generate_dts(d):
# CPU ---------------------------------------------------------------------------------------------- # CPU ----------------------------------------------------------------------------------------------
if cpu_name == "vexriscv_linux":
dts += """ dts += """
cpus {{ cpus {{
#address-cells = <1>; #address-cells = <1>;
@ -77,6 +79,25 @@ def generate_dts(d):
}}; }};
""".format(sys_clk_freq=int(50e6) if "sim" in d["constants"] else d["constants"]["config_clock_frequency"]) """.format(sys_clk_freq=int(50e6) if "sim" in d["constants"] else d["constants"]["config_clock_frequency"])
elif cpu_name == "mor1kx":
dts += """
cpus {{
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {{
compatible = "opencores,or1200-rtlsvn481";
reg = <0>;
clock-frequency = <{sys_clk_freq}>;
}};
}};
""".format(sys_clk_freq=d["constants"]["config_clock_frequency"])
else:
raise Exception("ERROR: unsupported CPU type {}".format(cpu_name))
# Memory ------------------------------------------------------------------------------------------- # Memory -------------------------------------------------------------------------------------------
dts += """ dts += """
@ -113,14 +134,21 @@ def generate_dts(d):
# Interrupt controller ----------------------------------------------------------------------------- # Interrupt controller -----------------------------------------------------------------------------
if cpu_name == "vexriscv_linux":
irq_controller_compatible = "vexriscv,intc0"
elif cpu_name == "mor1kx":
irq_controller_compatible = "opencores,or1k-pic"
else:
raise Exception("Unsupported CPU type: {}".format(cpu_name))
dts += """ dts += """
intc0: interrupt-controller { intc0: interrupt-controller {{
interrupt-controller; interrupt-controller;
#interrupt-cells = <1>; #interrupt-cells = <1>;
compatible = "vexriscv,intc0"; compatible = "{compatible}";
status = "okay"; status = "okay";
}; }};
""" """.format(compatible=irq_controller_compatible)
# SoC Controller ----------------------------------------------------------------------------------- # SoC Controller -----------------------------------------------------------------------------------