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fhdl/memory_efinix: Add efx to transformed memories to avoid conflicts.
Fix the crash with the LiteX identifier.
This commit is contained in:
parent
7914923d2d
commit
8c62bb8d2e
1 changed files with 12 additions and 12 deletions
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@ -16,7 +16,7 @@ def memory_emit_verilog(memory, ns, add_data_file):
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for i in range(memory.width // 8):
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r += "reg [" + str((memory.width//4)-1) + ":0] " \
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+ gn(memory) + '_' + str(i) \
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+ gn(memory) + '_efx_' + str(i) \
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+ "[0:" + str(memory.depth-1) + "];\n"
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adr_regs = {}
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@ -46,7 +46,7 @@ def memory_emit_verilog(memory, ns, add_data_file):
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M = (i+1)*port.we_granularity-1
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sl = "[" + str(M) + ":" + str(m) + "]"
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r += "\tif (" + gn(port.we) + "[" + str(i) + "])\n"
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r += "\t\t" + gn(memory) + '_' + str(i) + "[" + gn(port.adr) + "]" + " <= " + gn(port.dat_w) + sl + ";\n"
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r += "\t\t" + gn(memory) + '_efx_' + str(i) + "[" + gn(port.adr) + "]" + " <= " + gn(port.dat_w) + sl + ";\n"
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r += "end\n"
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else:
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r += "\tif (" + gn(port.we) + ")\n"
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@ -61,7 +61,7 @@ def memory_emit_verilog(memory, ns, add_data_file):
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m = i*port.we_granularity
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M = (i+1)*port.we_granularity-1
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sl = "[" + str(M) + ":" + str(m) + "]"
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bassign += gn(data_regs[id(port)]) + sl + " <= " + gn(memory) + "_" + str(i) + "[" + gn(port.adr) + "];\n"
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bassign += gn(data_regs[id(port)]) + sl + " <= " + gn(memory) + "_efx_" + str(i) + "[" + gn(port.adr) + "];\n"
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if port.mode == READ_FIRST:
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rd = "\t" + bassign
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elif port.mode == NO_CHANGE:
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@ -83,7 +83,7 @@ def memory_emit_verilog(memory, ns, add_data_file):
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m = i*port.we_granularity
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M = (i+1)*port.we_granularity-1
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sl = "[" + str(M) + ":" + str(m) + "]"
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r += "assign " + gn(port.dat_r) + sl + " = " + gn(memory) + "_" + str(i) + "[" + gn(adr_regs[id(port)]) + "];\n"
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r += "assign " + gn(port.dat_r) + sl + " = " + gn(memory) + "_efx_" + str(i) + "[" + gn(adr_regs[id(port)]) + "];\n"
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else:
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r += "assign " + gn(port.dat_r) + " = " + gn(data_regs[id(port)]) + ";\n"
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r += "\n"
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@ -118,15 +118,15 @@ def memory_emit_verilog(memory, ns, add_data_file):
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for d in init_31_24:
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content_31_24 += formatter.format(d)
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memory_filename1 = add_data_file(gn(memory) + "1.init", content_7_0)
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memory_filename2 = add_data_file(gn(memory) + "2.init", content_15_8)
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memory_filename3 = add_data_file(gn(memory) + "3.init", content_23_16)
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memory_filename4 = add_data_file(gn(memory) + "4.init", content_31_24)
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memory_filename1 = add_data_file(gn(memory) + "_efx_1.init", content_7_0)
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memory_filename2 = add_data_file(gn(memory) + "_efx_2.init", content_15_8)
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memory_filename3 = add_data_file(gn(memory) + "_efx_3.init", content_23_16)
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memory_filename4 = add_data_file(gn(memory) + "_efx_4.init", content_31_24)
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r += "initial begin\n"
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r += "\t$readmemh(\"" + memory_filename1 + "\", " + gn(memory)+ "_0" + ");\n"
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r += "\t$readmemh(\"" + memory_filename2 + "\", " + gn(memory)+ "_1" + ");\n"
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r += "\t$readmemh(\"" + memory_filename3 + "\", " + gn(memory)+ "_2" + ");\n"
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r += "\t$readmemh(\"" + memory_filename4 + "\", " + gn(memory)+ "_3" + ");\n"
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r += "\t$readmemh(\"" + memory_filename1 + "\", " + gn(memory)+ "_efx_0" + ");\n"
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r += "\t$readmemh(\"" + memory_filename2 + "\", " + gn(memory)+ "_efx_1" + ");\n"
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r += "\t$readmemh(\"" + memory_filename3 + "\", " + gn(memory)+ "_efx_2" + ");\n"
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r += "\t$readmemh(\"" + memory_filename4 + "\", " + gn(memory)+ "_efx_3" + ");\n"
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r += "end\n\n"
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return r
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