cores/jtag: cleanup instances.
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@ -25,13 +25,16 @@ class JTAGAtlantic(Module):
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p_LOG2_RXFIFO_DEPTH = "5", # FIXME: expose?
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p_LOG2_TXFIFO_DEPTH = "5", # FIXME: expose?
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p_SLD_AUTO_INSTANCE_INDEX = "YES",
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# Clk/Rst
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i_clk = ClockSignal("sys"),
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i_rst_n = ~ResetSignal("sys"),
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# TX
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i_r_dat = sink.data,
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i_r_val = sink.valid,
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o_r_ena = sink.ready,
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# RX
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o_t_dat = source.data,
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i_t_dav = source.ready,
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@ -54,8 +57,7 @@ class XilinxJTAG(Module):
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# # #
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self.specials += \
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Instance(primitive,
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self.specials += Instance(primitive,
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p_JTAG_CHAIN = chain,
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o_RESET = self.reset,
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