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litesdcard: use new Block2Mem/Mem2Block DMAs.
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parent
eeea30eada
commit
8d76509032
2 changed files with 23 additions and 27 deletions
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@ -1248,7 +1248,7 @@ class LiteXSoC(SoC):
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# Imports
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from litesdcard.phy import SDPHY
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from litesdcard.core import SDCore
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from litex.soc.cores.dma import WishboneDMAWriter, WishboneDMAReader
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from litesdcard.frontend.dma import SDBlock2MemDMA, SDMem2BlockDMA
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# Emulator / Pads
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if with_emulator:
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@ -1266,20 +1266,16 @@ class LiteXSoC(SoC):
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self.add_csr("sdphy")
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self.add_csr("sdcore")
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# SD Card Data Reader
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sdreader_bus = wishbone.Interface(data_width=self.bus.data_width, adr_width=self.bus.address_width)
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self.submodules.sdreader = WishboneDMAWriter(sdreader_bus, with_csr=True, endianness=self.cpu.endianness)
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self.bus.add_master("sdreader", master=sdreader_bus)
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self.add_csr("sdreader")
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self.submodules.sdreader_fifo = stream.SyncFIFO([("data", self.bus.data_width)], 512//(self.bus.data_width//8))
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self.comb += self.sdcore.source.connect(self.sdreader_fifo.sink)
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self.comb += self.sdreader_fifo.source.connect(self.sdreader.sink)
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# Block2Mem DMA
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bus = wishbone.Interface(data_width=self.bus.data_width, adr_width=self.bus.address_width)
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self.submodules.sdblock2mem = SDBlock2MemDMA(bus=bus, endianness=self.cpu.endianness)
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self.comb += self.sdcore.source.connect(self.sdblock2mem.sink)
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self.bus.add_master("sdblock2mem", master=bus)
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self.add_csr("sdblock2mem")
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# SD Card Data Writer
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sdwriter_bus = wishbone.Interface(data_width=self.bus.data_width, adr_width=self.bus.address_width)
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self.submodules.sdwriter = WishboneDMAReader(sdwriter_bus, with_csr=True, endianness=self.cpu.endianness)
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self.bus.add_master("sdwriter", master=sdwriter_bus)
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self.add_csr("sdwriter")
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self.submodules.sdwriter_fifo = stream.SyncFIFO([("data", self.bus.data_width)], 512//(self.bus.data_width//8))
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self.comb += self.sdwriter.source.connect(self.sdwriter_fifo.sink)
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self.comb += self.sdwriter_fifo.source.connect(self.sdcore.sink)
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# Mem2Block DMA
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bus = wishbone.Interface(data_width=self.bus.data_width, adr_width=self.bus.address_width)
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self.submodules.sdmem2block = SDMem2BlockDMA(bus=bus, endianness=self.cpu.endianness)
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self.comb += self.sdmem2block.source.connect(self.sdcore.sink)
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self.bus.add_master("sdmem2block", master=bus)
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self.add_csr("sdmem2block")
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@ -521,10 +521,10 @@ int sdcard_init(void) {
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void sdcard_read(uint32_t sector, uint32_t count, uint8_t* buf)
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{
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/* Initialize DMA Writer */
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sdreader_enable_write(0);
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sdreader_base_write((uint32_t) buf);
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sdreader_length_write(512*count);
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sdreader_enable_write(1);
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sdblock2mem_dma_enable_write(0);
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sdblock2mem_dma_base_write((uint32_t) buf);
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sdblock2mem_dma_length_write(512*count);
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sdblock2mem_dma_enable_write(1);
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/* Read Block(s) from SDCard */
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#ifdef SDCARD_CMD23_SUPPORT
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@ -533,7 +533,7 @@ sdcard_set_block_count(count);
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sdcard_read_multiple_block(sector, count);
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/* Wait for DMA Writer to complete */
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while ((sdreader_done_read() & 0x1) == 0);
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while ((sdblock2mem_dma_done_read() & 0x1) == 0);
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sdcard_stop_transmission();
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@ -544,13 +544,13 @@ void sdcard_write(uint32_t sector, uint32_t count, uint8_t* buf)
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{
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while (count--) {
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/* Initialize DMA Reader */
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sdwriter_enable_write(0);
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sdwriter_base_write((uint32_t) buf);
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sdwriter_length_write(512);
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sdwriter_enable_write(1);
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sdmem2block_dma_enable_write(0);
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sdmem2block_dma_base_write((uint32_t) buf);
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sdmem2block_dma_length_write(512);
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sdmem2block_dma_enable_write(1);
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/* Wait for DMA Reader to complete */
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while ((sdwriter_done_read() & 0x1) == 0);
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while ((sdmem2block_dma_done_read() & 0x1) == 0);
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/* Write Single Block to SDCard */
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#ifndef SDCARD_CMD23_SUPPORT
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