integration/soc_core: remove csr_map_update (no longer used)
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@ -34,7 +34,6 @@ from litex.soc.interconnect import wishbone, csr_bus, wishbone2csr
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__all__ = [
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"mem_decoder",
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"get_mem_data",
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"csr_map_update",
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"SoCCore",
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"soc_core_args",
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"soc_core_argdict",
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@ -104,10 +103,6 @@ def mem_decoder(address, size=0x10000000):
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size >>= 2 # bytes to words aligned
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return lambda a: (a[log2_int(size):-1] == (address >> log2_int(size)))
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def csr_map_update(csr_map, csr_peripherals):
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csr_map.update(dict((n, v)
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for v, n in enumerate(csr_peripherals, start=max(csr_map.values()) + 1)))
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# SoCController ------------------------------------------------------------------------------------
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class SoCController(Module, AutoCSR):
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