build/lattice: cleanup/simplify (no functional changes)
icestorm still need to be cleaned up
This commit is contained in:
parent
946478a71e
commit
8fb3f9a90d
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@ -19,7 +19,7 @@ from litex.build.lattice import common
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def _produces_jedec(device):
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return device.startswith("LCMX")
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# IO Constraints (.lpf) ----------------------------------------------------------------------------
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# Constraints (.lpf) -------------------------------------------------------------------------------
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def _format_constraint(c):
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if isinstance(c, Pins):
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@ -176,12 +176,12 @@ class LatticeDiamondToolchain:
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v_output.write(v_file)
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platform.add_source(v_file)
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# Generate design constraints file (.lpf)
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_build_lpf(named_sc, named_pc, build_name)
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# Generate design script file (.tcl)
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_build_tcl(platform.device, platform.sources, platform.verilog_include_paths, build_name)
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# Generate design timing constraints file (.lpf)
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_build_lpf(named_sc, named_pc, build_name)
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# Generate build script
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script = _build_script(build_name, platform.device, toolchain_path)
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@ -1,4 +1,4 @@
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# This file is Copyright (c) 2015-2018 Florent Kermarrec <florent@enjoy-digital.fr>
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# This file is Copyright (c) 2015-2019 Florent Kermarrec <florent@enjoy-digital.fr>
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# This file is Copyright (c) 2017-2018 William D. Jones <thor0505@comcast.net>
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# License: BSD
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@ -8,6 +8,7 @@ import subprocess
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from litex.build.generic_programmer import GenericProgrammer
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from litex.build import tools
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# LatticeProgrammer --------------------------------------------------------------------------------
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class LatticeProgrammer(GenericProgrammer):
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needs_bitreverse = False
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@ -21,6 +22,7 @@ class LatticeProgrammer(GenericProgrammer):
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tools.write_to_file(xcf_file, xcf_content)
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subprocess.call(["pgrcmd", "-infile", xcf_file])
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# IceStormProgrammer -------------------------------------------------------------------------------
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class IceStormProgrammer(GenericProgrammer):
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needs_bitreverse = False
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@ -31,6 +33,7 @@ class IceStormProgrammer(GenericProgrammer):
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def load_bitstream(self, bitstream_file):
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subprocess.call(["iceprog", "-S", bitstream_file])
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# IceBurnProgrammer --------------------------------------------------------------------------------
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class IceBurnProgrammer(GenericProgrammer):
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def __init__(self, iceburn_path):
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@ -42,6 +45,7 @@ class IceBurnProgrammer(GenericProgrammer):
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def load_bitstream(self, bitstream_file):
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subprocess.call([self.iceburn, "-evw", bitstream_file])
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# TinyFpgaBProgrammer ------------------------------------------------------------------------------
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class TinyFpgaBProgrammer(GenericProgrammer):
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needs_bitreverse = False
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@ -57,6 +61,7 @@ class TinyFpgaBProgrammer(GenericProgrammer):
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def boot(self):
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subprocess.call(["tinyfpgab", "-b"])
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# TinyProgProgrammer -------------------------------------------------------------------------------
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# Different bootloader protocol requires different application. In the basic
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# case, command-line arguments are the same. Note that this programmer can
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@ -85,6 +90,7 @@ class TinyProgProgrammer(GenericProgrammer):
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def boot(self):
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subprocess.call(["tinyprog", "-b"])
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# MyStormProgrammer --------------------------------------------------------------------------------
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class MyStormProgrammer(GenericProgrammer):
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def __init__(self, serial_port):
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@ -1,4 +1,4 @@
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# This file is Copyright (c) 2018 Florent Kermarrec <florent@enjoy-digital.fr>
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# This file is Copyright (c) 2018-2019 Florent Kermarrec <florent@enjoy-digital.fr>
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# This file is Copyright (c) 2018-2019 David Shah <dave@ds0.me>
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# This file is Copyright (c) 2018 William D. Jones <thor0505@comcast.net>
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# License: BSD
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@ -13,35 +13,7 @@ from litex.build.generic_platform import *
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from litex.build import tools
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from litex.build.lattice import common
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# TODO:
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# - check/document attr_translate.
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nextpnr_ecp5_architectures = {
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"lfe5u-25f": "25k",
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"lfe5u-45f": "45k",
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"lfe5u-85f": "85k",
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"lfe5um-25f": "um-25k",
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"lfe5um-45f": "um-45k",
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"lfe5um-85f": "um-85k",
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"lfe5um5g-25f": "um5g-25k",
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"lfe5um5g-45f": "um5g-45k",
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"lfe5um5g-85f": "um5g-85k",
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}
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def nextpnr_ecp5_package(package):
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if "285" in package:
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return "CSFBGA285"
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elif "256" in package:
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return "CABGA256"
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elif "381" in package:
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return "CABGA381"
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elif "554" in package:
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return "CABGA554"
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elif "756" in package:
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return "CABGA756"
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raise ValueError("Unknown package")
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# IO Constraints (.lpf) ----------------------------------------------------------------------------
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def _format_constraint(c):
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if isinstance(c, Pins):
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@ -54,51 +26,112 @@ def _format_constraint(c):
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def _format_lpf(signame, pin, others, resname):
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fmt_c = [_format_constraint(c) for c in ([Pins(pin)] + others)]
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r = ""
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lpf = []
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for pre, suf in fmt_c:
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r += pre + "\"" + signame + "\"" + suf + ";\n"
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return r
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lpf.append(pre + "\"" + signame + "\"" + suf + ";")
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return "\n".join(lpf)
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def _build_lpf(named_sc, named_pc):
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r = "BLOCK RESETPATHS;\n"
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r += "BLOCK ASYNCPATHS;\n"
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def _build_lpf(named_sc, named_pc, build_name):
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lpf = []
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lpf.append("BLOCK RESETPATHS;")
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lpf.append("BLOCK ASYNCPATHS;")
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for sig, pins, others, resname in named_sc:
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if len(pins) > 1:
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for i, p in enumerate(pins):
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r += _format_lpf(sig + "[" + str(i) + "]", p, others, resname)
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lpf.append(_format_lpf(sig + "[" + str(i) + "]", p, others, resname))
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else:
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r += _format_lpf(sig, pins[0], others, resname)
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lpf.append(_format_lpf(sig, pins[0], others, resname))
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if named_pc:
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r += "\n" + "\n\n".join(named_pc)
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return r
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lpf.append("\n\n".join(named_pc))
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tools.write_to_file(build_name + ".lpf", "\n".join(lpf))
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# Yosys/Nextpnr Helpers/Templates ------------------------------------------------------------------
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def _build_script(source, build_template, build_name, architecture,
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package, freq_constraint, timingstrict):
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_yosys_template = [
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"{read_files}",
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"attrmap -tocase keep -imap keep=\"true\" keep=1 -imap keep=\"false\" keep=0 -remove keep=0",
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"synth_ecp5 -abc9 {nwl} -json {build_name}.json -top {build_name}",
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]
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def _yosys_import_sources(platform):
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includes = ""
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reads = []
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for path in platform.verilog_include_paths:
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includes += " -I" + path
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for filename, language, library in platform.sources:
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reads.append("read_{}{} {}".format(
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language, includes, filename))
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return "\n".join(reads)
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def _build_yosys(template, platform, nowidelut, build_name):
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ys = []
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for l in template:
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ys.append(l.format(
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build_name = build_name,
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nwl = "-nowidelut" if nowidelut else "",
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read_files = _yosys_import_sources(platform)
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))
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tools.write_to_file(build_name + ".ys", "\n".join(ys))
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nextpnr_ecp5_architectures = {
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"lfe5u-25f" : "25k",
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"lfe5u-45f" : "45k",
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"lfe5u-85f" : "85k",
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"lfe5um-25f" : "um-25k",
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"lfe5um-45f" : "um-45k",
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"lfe5um-85f" : "um-85k",
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"lfe5um5g-25f": "um5g-25k",
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"lfe5um5g-45f": "um5g-45k",
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"lfe5um5g-85f": "um5g-85k",
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}
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def nextpnr_ecp5_package(package):
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if "256" in package:
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return "CABGA256"
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elif "285" in package:
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return "CSFBGA285"
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elif "381" in package:
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return "CABGA381"
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elif "554" in package:
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return "CABGA554"
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elif "756" in package:
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return "CABGA756"
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raise ValueError("Unknown package {}".format(package))
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# Script -------------------------------------------------------------------------------------------
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_build_template = [
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"yosys -q -l {build_name}.rpt {build_name}.ys",
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"nextpnr-ecp5 --json {build_name}.json --lpf {build_name}.lpf --textcfg {build_name}.config \
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--{architecture} --package {package} --freq {freq_constraint} {timefailarg}",
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"ecppack {build_name}.config --svf {build_name}.svf --bit {build_name}.bit"
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]
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def _build_script(source, build_template, build_name, architecture, package, freq_constraint, timingstrict):
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if sys.platform in ("win32", "cygwin"):
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script_ext = ".bat"
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build_script_contents = "@echo off\nrem Autogenerated by LiteX / git: " + tools.get_litex_git_revision() + "\n\n"
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script_contents = "@echo off\nrem Autogenerated by LiteX / git: " + tools.get_litex_git_revision() + "\n\n"
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fail_stmt = " || exit /b"
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else:
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script_ext = ".sh"
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build_script_contents = "# Autogenerated by LiteX / git: " + tools.get_litex_git_revision() + "\nset -e\n"
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script_contents = "# Autogenerated by LiteX / git: " + tools.get_litex_git_revision() + "\nset -e\n"
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fail_stmt = ""
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for s in build_template:
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s_fail = s + "{fail_stmt}\n" # Required so Windows scripts fail early.
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build_script_contents += s_fail.format(build_name=build_name,
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architecture=architecture,
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package=package,
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freq_constraint=freq_constraint,
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timefailarg="--timing-allow-fail" if not timingstrict else "",
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fail_stmt=fail_stmt)
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script_contents += s_fail.format(
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build_name = build_name,
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architecture = architecture,
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package = package,
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freq_constraint = freq_constraint,
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timefailarg = "--timing-allow-fail" if not timingstrict else "",
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fail_stmt = fail_stmt)
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build_script_file = "build_" + build_name + script_ext
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tools.write_to_file(build_script_file, build_script_contents,
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force_unix=False)
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return build_script_file
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script_file = "build_" + build_name + script_ext
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tools.write_to_file(script_file, script_contents, force_unix=False)
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return script_file
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def _run_script(script):
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if sys.platform in ("win32", "cygwin"):
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@ -109,17 +142,7 @@ def _run_script(script):
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if subprocess.call(shell + [script]) != 0:
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raise OSError("Subprocess failed")
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def yosys_import_sources(platform):
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includes = ""
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reads = []
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for path in platform.verilog_include_paths:
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includes += " -I" + path
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for filename, language, library in platform.sources:
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reads.append("read_{}{} {}".format(
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language, includes, filename))
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return "\n".join(reads)
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# LatticeTrellisToolchain --------------------------------------------------------------------------
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class LatticeTrellisToolchain:
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attr_translate = {
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@ -138,77 +161,71 @@ class LatticeTrellisToolchain:
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special_overrides = common.lattice_ecpx_trellis_special_overrides
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def __init__(self):
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self.yosys_template = [
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"{read_files}",
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"attrmap -tocase keep -imap keep=\"true\" keep=1 -imap keep=\"false\" keep=0 -remove keep=0",
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"synth_ecp5 -abc9 {nwl} -json {build_name}.json -top {build_name}",
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]
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self.build_template = [
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"yosys -q -l {build_name}.rpt {build_name}.ys",
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"nextpnr-ecp5 --json {build_name}.json --lpf {build_name}.lpf --textcfg {build_name}.config --{architecture} --package {package} --freq {freq_constraint} {timefailarg}",
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"ecppack {build_name}.config --svf {build_name}.svf --bit {build_name}.bit"
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]
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self.yosys_template = _yosys_template
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self.build_template = _build_template
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self.freq_constraints = dict()
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def build(self, platform, fragment, build_dir="build", build_name="top",
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toolchain_path=None, run=True,
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nowidelut=False, timingstrict=False,
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def build(self, platform, fragment,
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build_dir = "build",
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build_name = "top",
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toolchain_path = None,
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run = True,
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nowidelut = False,
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timingstrict = False,
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**kwargs):
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# Get default toolchain path (if not specified)
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if toolchain_path is None:
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toolchain_path = "/usr/share/trellis/"
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# Create build directory
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os.makedirs(build_dir, exist_ok=True)
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cwd = os.getcwd()
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os.chdir(build_dir)
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# generate verilog
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# Finalize design
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if not isinstance(fragment, _Fragment):
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fragment = fragment.get_fragment()
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platform.finalize(fragment)
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top_output = platform.get_verilog(fragment, name=build_name, **kwargs)
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named_sc, named_pc = platform.resolve_signals(top_output.ns)
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# Generate verilog
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v_output = platform.get_verilog(fragment, name=build_name, **kwargs)
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named_sc, named_pc = platform.resolve_signals(v_output.ns)
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top_file = build_name + ".v"
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top_output.write(top_file)
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v_output.write(top_file)
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platform.add_source(top_file)
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# generate constraints
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tools.write_to_file(build_name + ".lpf",
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_build_lpf(named_sc, named_pc))
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# Generate design constraints file (.lpf)
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_build_lpf(named_sc, named_pc, build_name)
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# generate yosys script
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yosys_script_file = build_name + ".ys"
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yosys_script_contents = "\n".join(_.format(build_name=build_name,
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nwl="-nowidelut" if nowidelut else "",
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read_files=yosys_import_sources(platform))
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for _ in self.yosys_template)
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tools.write_to_file(yosys_script_file, yosys_script_contents)
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# Generate Yosys script
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_build_yosys(self.yosys_template, platform, nowidelut, build_name)
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# transform platform.device to nextpnr's architecture
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# Translate device to Nextpnr architecture/package
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(family, size, package) = platform.device.split("-")
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architecture = nextpnr_ecp5_architectures[(family + "-" + size).lower()]
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package = nextpnr_ecp5_package(package)
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freq_constraint = str(max(self.freq_constraints.values(),
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default=0.0))
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script = _build_script(False, self.build_template, build_name,
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architecture, package, freq_constraint,
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timingstrict)
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freq_constraint = str(max(self.freq_constraints.values(), default=0.0))
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# run scripts
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# Generate build script
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script = _build_script(False, self.build_template, build_name, architecture, package,
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freq_constraint, timingstrict)
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# Run
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if run:
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_run_script(script)
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os.chdir(cwd)
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return top_output.ns
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return v_output.ns
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# Until nextpnr-ecp5 can handle multiple clock domains, use the same
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# approach as the icestorm and use the fastest clock for timing
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# constraints.
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def add_period_constraint(self, platform, clk, period):
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platform.add_platform_command("""FREQUENCY PORT "{clk}" {freq} MHz;""".format(freq=str(float(1/period)*1000), clk="{clk}"), clk=clk)
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platform.add_platform_command("""FREQUENCY PORT "{clk}" {freq} MHz;""".format(
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freq=str(float(1/period)*1000), clk="{clk}"), clk=clk)
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def trellis_args(parser):
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parser.add_argument("--yosys-nowidelut", action="store_true",
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