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cpu/vexriscv: bump submodule

This commit is contained in:
Mateusz Holenko 2019-07-25 08:43:35 +02:00
parent bc7ab637dd
commit 932475a29b
1 changed files with 1 additions and 1 deletions
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2
litex/soc/cores/cpu/vexriscv/verilog

@ -1 +1 @@
Subproject commit 747a2e012f43d13c3487acc3c758477aad277559
Subproject commit 854f9bd2282c97251ce65e4117c5cf1630722004