litex_json2dts_linux: Rename ncpus to cpu_count (Consistency with other variables).
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2ddf9bb4e5
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962bd67431
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@ -30,10 +30,10 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
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}
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}
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# CPU Parameters -------------------------------------------------------------------------------
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# CPU Parameters -------------------------------------------------------------------------------
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ncpus = int(d["constants"].get("config_cpu_count", 1))
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cpu_count = int(d["constants"].get("config_cpu_count", 1))
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cpu_name = d["constants"].get("config_cpu_name")
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cpu_name = d["constants"].get("config_cpu_name")
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cpu_arch = cpu_architectures[cpu_name]
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cpu_arch = cpu_architectures[cpu_name]
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cpu_isa = d["constants"].get("config_cpu_isa", None) # kernel < 6.6.0
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cpu_isa = d["constants"].get("config_cpu_isa", None) # kernel < 6.6.0
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# kernel >= 6.6.0
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# kernel >= 6.6.0
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cpu_isa_base = cpu_isa[:5]
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cpu_isa_base = cpu_isa[:5]
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@ -195,11 +195,11 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
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# CPU(s) Topology.
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# CPU(s) Topology.
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cpu_map = ""
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cpu_map = ""
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if ncpus > 1:
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if cpu_count > 1:
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cpu_map += """
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cpu_map += """
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cpu-map {
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cpu-map {
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cluster0 {"""
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cluster0 {"""
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for cpu in range(ncpus):
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for cpu in range(cpu_count):
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cpu_map += """
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cpu_map += """
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core{cpu} {{
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core{cpu} {{
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cpu = <&CPU{cpu}>;
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cpu = <&CPU{cpu}>;
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@ -214,7 +214,7 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
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#size-cells = <0>;
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#size-cells = <0>;
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timebase-frequency = <{sys_clk_freq}>;
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timebase-frequency = <{sys_clk_freq}>;
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""".format(sys_clk_freq=d["constants"]["config_clock_frequency"])
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""".format(sys_clk_freq=d["constants"]["config_clock_frequency"])
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for cpu in range(ncpus):
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for cpu in range(cpu_count):
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dts += """
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dts += """
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CPU{cpu}: cpu@{cpu} {{
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CPU{cpu}: cpu@{cpu} {{
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device_type = "cpu";
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device_type = "cpu";
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@ -352,7 +352,7 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
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}};
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}};
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""".format(
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""".format(
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clint_base=d["memories"]["clint"]["base"],
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clint_base=d["memories"]["clint"]["base"],
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cpu_mapping =("\n" + " "*20).join(["&L{} 3 &L{} 7".format(cpu, cpu) for cpu in range(ncpus)]))
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cpu_mapping =("\n" + " "*20).join(["&L{} 3 &L{} 7".format(cpu, cpu) for cpu in range(cpu_count)]))
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if cpu_arch == "riscv":
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if cpu_arch == "riscv":
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if cpu_name == "rocket":
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if cpu_name == "rocket":
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extra_attr = """
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extra_attr = """
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@ -376,7 +376,7 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
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}};
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}};
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""".format(
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""".format(
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plic_base =d["memories"]["plic"]["base"],
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plic_base =d["memories"]["plic"]["base"],
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cpu_mapping =("\n" + " "*20).join(["&L{} 11 &L{} 9".format(cpu, cpu) for cpu in range(ncpus)]),
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cpu_mapping =("\n" + " "*20).join(["&L{} 11 &L{} 9".format(cpu, cpu) for cpu in range(cpu_count)]),
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extra_attr =extra_attr)
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extra_attr =extra_attr)
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elif cpu_arch == "or1k":
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elif cpu_arch == "or1k":
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@ -410,7 +410,7 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
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reg-names = "mem";
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reg-names = "mem";
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}};
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}};
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""".format(
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""".format(
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cpu_mapping =("\n" + " "*20).join(["&L{} 0x3F".format(cpu) for cpu in range(ncpus)]))
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cpu_mapping =("\n" + " "*20).join(["&L{} 0x3F".format(cpu) for cpu in range(cpu_count)]))
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# UART -----------------------------------------------------------------------------------------
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# UART -----------------------------------------------------------------------------------------
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if "uart" in d["csr_bases"]:
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if "uart" in d["csr_bases"]:
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