platforms/targets: fix CI.

This commit is contained in:
Florent Kermarrec 2020-05-05 15:55:09 +02:00
parent 22bcbec03a
commit 98d1b45157
3 changed files with 4 additions and 6 deletions

View File

@ -199,5 +199,5 @@ class Platform(XilinxPlatform):
def do_finalize(self, fragment):
XilinxPlatform.do_finalize(self, fragment)
self.add_period_constraint(self.lookup_request("clk50", loose=True), 1e9/50e6)
self.add_period_constraint(self.lookup_request("eth_clocks", loose=True), 1e9/50e6)
self.add_period_constraint(self.lookup_request("clk50", loose=True), 1e9/50e6)
self.add_period_constraint(self.lookup_request("eth_clocks:ref_clk", loose=True), 1e9/50e6)

View File

@ -243,5 +243,5 @@ class Platform(XilinxPlatform):
def do_finalize(self, fragment):
XilinxPlatform.do_finalize(self, fragment)
self.add_period_constraint(self.lookup_request("clk100", loose=True), 1e9/100e6)
self.add_period_constraint(self.lookup_request("eth_clocks", loose=True), 1e9/125e6)
self.add_period_constraint(self.lookup_request("clk100", loose=True), 1e9/100e6)
self.add_period_constraint(self.lookup_request("eth_clocks:rx", loose=True), 1e9/125e6)

View File

@ -134,7 +134,6 @@ class TestTargets(unittest.TestCase):
litex/boards/targets/simple.py litex.boards.platforms.{p} \
--cpu-type=vexriscv \
--no-compile-software \
--no-compile-gateware \
--uart-name=stub \
""".format(p=p)
subprocess.check_call(cmd, shell=True)
@ -155,7 +154,6 @@ litex/boards/targets/simple.py litex.boards.platforms.arty \
--cpu-type={c} \
--cpu-variant={v} \
--no-compile-software \
--no-compile-gateware \
--uart-name=stub \
""".format(c=cpu, v=variant)
subprocess.check_output(cmd, shell=True)