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targets/nexys4ddr: add default kwargs parameters.

This commit is contained in:
Florent Kermarrec 2020-03-02 09:44:20 +01:00
parent 598ad692a0
commit 98e41e2e0d
1 changed files with 3 additions and 3 deletions
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6
litex/boards/targets/nexys4ddr.py
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@ -75,9 +75,9 @@ class BaseSoC(SoCCore):
phy = self.ddrphy, phy = self.ddrphy,
module = MT47H64M16(sys_clk_freq, "1:2"), module = MT47H64M16(sys_clk_freq, "1:2"),
origin = self.mem_map["main_ram"], origin = self.mem_map["main_ram"],
size = kwargs["max_sdram_size"], size = kwargs.get("max_sdram_size", 0x40000000),
l2_cache_size = kwargs["l2_size"], l2_cache_size = kwargs.get("l2_size", 8192),
l2_cache_min_data_width = kwargs["min_l2_data_width"], l2_cache_min_data_width = kwargs.get("min_l2_data_width", 128),
l2_cache_reverse = True l2_cache_reverse = True
) )