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Merge pull request #2069 from VOGL-electronic/fix-sim-ethernet 

sim: add HW_PREAMBLE_CRC for ethernet
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enjoy-digital 2024-09-13 08:36:40 +02:00 committed by GitHub
parent dc8c1bd9cd 2fd8c2cd61
commit 99550809b3
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litex/tools/litex_sim.py
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@ -237,6 +237,7 @@ class SimSoC(SoCCore):
if with_ethernet or with_etherbone: if with_ethernet or with_etherbone:
if ethernet_phy_model == "sim": if ethernet_phy_model == "sim":
self.ethphy = LiteEthPHYModel(self.platform.request("eth", 0)) self.ethphy = LiteEthPHYModel(self.platform.request("eth", 0))
self.add_constant("HW_PREAMBLE_CRC");
elif ethernet_phy_model == "xgmii": elif ethernet_phy_model == "xgmii":
self.ethphy = LiteEthPHYXGMII(None, self.platform.request("xgmii_eth", 0), model=True) self.ethphy = LiteEthPHYXGMII(None, self.platform.request("xgmii_eth", 0), model=True)
elif ethernet_phy_model == "gmii": elif ethernet_phy_model == "gmii":