integration/soc/add_video_framebuffer: Modify default framebuffer base address.
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@ -1711,7 +1711,7 @@ class LiteXSoC(SoC):
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setattr(self.submodules, f"{name}_vtg", vtg)
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# Video FrameBuffer.
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base = self.mem_map.get(name, 0x48000000)
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base = self.mem_map.get(name, 0x40c00000)
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hres = int(timings.split("@")[0].split("x")[0])
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vres = int(timings.split("@")[0].split("x")[1])
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vfb = VideoFrameBuffer(self.sdram.crossbar.get_port(),
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