Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

sdram/phy/simphy: remove use of iter

This commit is contained in:
Florent Kermarrec 2015-03-26 23:02:23 +01:00
parent e6de4b1bf9
commit 9a9af17aca
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
misoclib/mem/sdram/phy/simphy.py
View File

@ -194,6 +194,6 @@ class SDRAMPHYSim(Module):
banks_read_data = new_banks_read_data banks_read_data = new_banks_read_data
self.comb += [ self.comb += [
Cat(iter([phase.rddata_valid for phase in phases])).eq(banks_read), Cat(*[phase.rddata_valid for phase in phases]).eq(banks_read),
Cat(iter([phase.rddata for phase in phases])).eq(banks_read_data) Cat(*[phase.rddata for phase in phases]).eq(banks_read_data)
] ]