software/liblitedram/sdram: remove low level manual controls of the DFI interface.

This was too low level and unused.
This commit is contained in:
Florent Kermarrec 2020-09-16 11:22:15 +02:00
parent 8a9d17c768
commit 9c2975e8b4
3 changed files with 0 additions and 285 deletions

View File

@ -14,168 +14,6 @@
#include "../command.h"
#include "../helpers.h"
/**
* Command "sdrrow"
*
* Precharge/Activate row
*
*/
#ifdef CSR_SDRAM_BASE
static void sdrrow_handler(int nb_params, char **params)
{
char *c;
unsigned int row;
if (nb_params < 1) {
sdrrow(0);
printf("Precharged");
}
row = strtoul(params[0], &c, 0);
if (*c != 0) {
printf("Incorrect row");
return;
}
sdrrow(row);
printf("Activated row %d", row);
}
define_command(sdrrow, sdrrow_handler, "Precharge/Activate row", LITEDRAM_CMDS);
#endif
/**
* Command "sdrsw"
*
* Gives SDRAM control to SW
*
*/
#ifdef CSR_SDRAM_BASE
define_command(sdrsw, sdrsw, "Gives SDRAM control to SW", LITEDRAM_CMDS);
#endif
/**
* Command "sdrhw"
*
* Gives SDRAM control to HW
*
*/
#ifdef CSR_SDRAM_BASE
define_command(sdrhw, sdrhw, "Gives SDRAM control to HW", LITEDRAM_CMDS);
#endif
/**
* Command "sdrrdbuf"
*
* Dump SDRAM read buffer
*
*/
#ifdef CSR_SDRAM_BASE
static void sdrrdbuf_handler(int nb_params, char **params)
{
sdrrdbuf(-1);
}
define_command(sdrrdbuf, sdrrdbuf_handler, "Dump SDRAM read buffer", LITEDRAM_CMDS);
#endif
/**
* Command "sdrrd"
*
* Read SDRAM data
*
*/
#ifdef CSR_SDRAM_BASE
static void sdrrd_handler(int nb_params, char **params)
{
unsigned int addr;
int dq;
char *c;
if (nb_params < 1) {
printf("sdrrd <address>");
return;
}
addr = strtoul(params[0], &c, 0);
if (*c != 0) {
printf("Incorrect address");
return;
}
if (nb_params < 2)
dq = -1;
else {
dq = strtoul(params[1], &c, 0);
if (*c != 0) {
printf("Incorrect DQ");
return;
}
}
sdrrd(addr, dq);
}
define_command(sdrrd, sdrrd_handler, "Read SDRAM data", LITEDRAM_CMDS);
#endif
/**
* Command "sdrrderr"
*
* Print SDRAM read errors
*
*/
#ifdef CSR_SDRAM_BASE
static void sdrrderr_handler(int nb_params, char **params)
{
int count;
char *c;
if (nb_params < 1) {
printf("sdrrderr <count>");
return;
}
count = strtoul(params[0], &c, 0);
if (*c != 0) {
printf("Incorrect count");
return;
}
sdrrderr(count);
}
define_command(sdrrderr, sdrrderr_handler, "Print SDRAM read errors", LITEDRAM_CMDS);
#endif
/**
* Command "sdrwr"
*
* Write SDRAM test data
*
*/
#ifdef CSR_SDRAM_BASE
static void sdrwr_handler(int nb_params, char **params)
{
unsigned int addr;
char *c;
if (nb_params < 1) {
printf("sdrwr <address>");
return;
}
addr = strtoul(params[0], &c, 0);
if (*c != 0) {
printf("Incorrect address");
return;
}
sdrwr(addr);
}
define_command(sdrwr, sdrwr_handler, "Write SDRAM test data", LITEDRAM_CMDS);
#endif
/**
* Command "sdrinit"
*

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@ -81,119 +81,6 @@ void sdrhw(void)
}
}
/*-----------------------------------------------------------------------*/
/* Manual Control */
/*-----------------------------------------------------------------------*/
void sdrrow(unsigned int row)
{
if(row == 0) {
sdram_dfii_pi0_address_write(0x0000);
sdram_dfii_pi0_baddress_write(0);
command_p0(DFII_COMMAND_RAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
cdelay(15);
} else {
sdram_dfii_pi0_address_write(row);
sdram_dfii_pi0_baddress_write(0);
command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CS);
cdelay(15);
}
}
void sdrrdbuf(int dq)
{
int i, p;
int first_byte, step;
unsigned char buf[DFII_PIX_DATA_BYTES];
if(dq < 0) {
first_byte = 0;
step = 1;
} else {
first_byte = DFII_PIX_DATA_BYTES/2 - 1 - dq;
step = DFII_PIX_DATA_BYTES/2;
}
for(p=0;p<SDRAM_PHY_PHASES;p++) {
csr_rd_buf_uint8(sdram_dfii_pix_rddata_addr[p],
buf, DFII_PIX_DATA_BYTES);
for(i=first_byte;i<DFII_PIX_DATA_BYTES;i+=step)
printf("%02x", buf[i]);
}
printf("\n");
}
void sdrrd(unsigned int addr, int dq)
{
sdram_dfii_pird_address_write(addr);
sdram_dfii_pird_baddress_write(0);
command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA);
cdelay(15);
sdrrdbuf(dq);
}
void sdrrderr(int count)
{
int addr;
int i, j, p;
unsigned char prev_data[SDRAM_PHY_PHASES][DFII_PIX_DATA_BYTES];
unsigned char errs[SDRAM_PHY_PHASES][DFII_PIX_DATA_BYTES];
unsigned char new_data[DFII_PIX_DATA_BYTES];
for(p=0;p<SDRAM_PHY_PHASES;p++)
for(i=0;i<DFII_PIX_DATA_BYTES;i++)
errs[p][i] = 0;
for(addr=0;addr<16;addr++) {
sdram_dfii_pird_address_write(addr*8);
sdram_dfii_pird_baddress_write(0);
command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA);
cdelay(15);
for(p=0;p<SDRAM_PHY_PHASES;p++)
csr_rd_buf_uint8(sdram_dfii_pix_rddata_addr[p],
prev_data[p], DFII_PIX_DATA_BYTES);
for(j=0;j<count;j++) {
command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA);
cdelay(15);
for(p=0;p<SDRAM_PHY_PHASES;p++) {
csr_rd_buf_uint8(sdram_dfii_pix_rddata_addr[p],
new_data, DFII_PIX_DATA_BYTES);
for(i=0;i<DFII_PIX_DATA_BYTES;i++) {
errs[p][i] |= prev_data[p][i] ^ new_data[i];
prev_data[p][i] = new_data[i];
}
}
}
}
for(p=0;p<SDRAM_PHY_PHASES;p++)
for(i=0;i<DFII_PIX_DATA_BYTES;i++)
printf("%02x", errs[p][i]);
printf("\n");
for(p=0;p<SDRAM_PHY_PHASES;p++)
for(i=0;i<DFII_PIX_DATA_BYTES;i++)
printf("%2x", DFII_PIX_DATA_BYTES/2 - 1 - (i % (DFII_PIX_DATA_BYTES/2)));
printf("\n");
}
void sdrwr(unsigned int addr)
{
int i, p;
unsigned char buf[DFII_PIX_DATA_BYTES];
for(p=0;p<SDRAM_PHY_PHASES;p++) {
for(i=0;i<DFII_PIX_DATA_BYTES;i++)
buf[i] = 0x10*p + i;
csr_wr_buf_uint8(sdram_dfii_pix_wrdata_addr[p],
buf, DFII_PIX_DATA_BYTES);
}
sdram_dfii_piwr_address_write(addr);
sdram_dfii_piwr_baddress_write(0);
command_pwr(DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS|DFII_COMMAND_WRDATA);
}
#ifdef CSR_DDRPHY_BASE
/*-----------------------------------------------------------------------*/

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@ -17,16 +17,6 @@ int sdrfreq(void);
void sdrsw(void);
void sdrhw(void);
/*-----------------------------------------------------------------------*/
/* Manual Control */
/*-----------------------------------------------------------------------*/
void sdrrow(unsigned int row);
void sdrrdbuf(int dq);
void sdrrd(unsigned int addr, int dq);
void sdrrderr(int count);
void sdrwr(unsigned int addr);
/*-----------------------------------------------------------------------*/
/* Write Leveling */
/*-----------------------------------------------------------------------*/