litex_json2dts_linux: Add support for multiple Ethernet interfaces
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@ -393,10 +393,14 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
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uart_interrupt = "" if polling else "interrupts = <{}>;".format(d["constants"]["uart_interrupt"]))
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# Ethernet -------------------------------------------------------------------------------------
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for i in [''] + list(range(0, 10)):
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idx = (0 if i == '' else i)
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ethphy_name = "ethphy" + str(i)
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ethmac_name = "ethmac" + str(i)
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if ethphy_name in d["csr_bases"] and ethmac_name in d["csr_bases"]:
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if "ethphy" in d["csr_bases"] and "ethmac" in d["csr_bases"]:
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dts += """
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mac0: mac@{ethmac_csr_base:x} {{
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mac{idx}: mac@{ethmac_csr_base:x} {{
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compatible = "litex,liteeth";
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reg = <0x{ethmac_csr_base:x} 0x7c>,
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<0x{ethphy_csr_base:x} 0x0a>,
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@ -409,14 +413,15 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
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status = "okay";
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}};
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""".format(
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ethphy_csr_base = d["csr_bases"]["ethphy"],
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ethmac_csr_base = d["csr_bases"]["ethmac"],
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ethmac_mem_base = d["memories"]["ethmac"]["base"],
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ethmac_mem_size = d["memories"]["ethmac"]["size"],
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ethmac_rx_slots = d["constants"]["ethmac_rx_slots"],
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ethmac_tx_slots = d["constants"]["ethmac_tx_slots"],
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ethmac_slot_size = d["constants"]["ethmac_slot_size"],
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ethmac_interrupt = "" if polling else "interrupts = <{}>;".format(d["constants"]["ethmac_interrupt"]))
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idx = idx,
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ethphy_csr_base = d["csr_bases"][ethphy_name],
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ethmac_csr_base = d["csr_bases"][ethmac_name],
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ethmac_mem_base = d["memories"][ethmac_name]["base"],
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ethmac_mem_size = d["memories"][ethmac_name]["size"],
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ethmac_rx_slots = d["constants"][ethmac_name + "_rx_slots"],
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ethmac_tx_slots = d["constants"][ethmac_name + "_tx_slots"],
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ethmac_slot_size = d["constants"][ethmac_name + "_slot_size"],
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ethmac_interrupt = "" if polling else "interrupts = <{}>;".format(d["constants"][ethmac_name + "_interrupt"]))
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# USB OHCI -------------------------------------------------------------------------------------
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