liteusb: pep8 (E231)
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@ -16,14 +16,14 @@ class FT2232HPHY(Module):
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# Read Fifo (Ftdi --> SoC)
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# Read Fifo (Ftdi --> SoC)
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read_fifo = RenameClockDomains(AsyncFIFO(phy_layout, fifo_depth),
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read_fifo = RenameClockDomains(AsyncFIFO(phy_layout, fifo_depth),
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{"write":"ftdi", "read":"sys"})
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{"write": "ftdi", "read": "sys"})
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read_buffer = RenameClockDomains(SyncFIFO(phy_layout, 4),
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read_buffer = RenameClockDomains(SyncFIFO(phy_layout, 4),
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{"sys":"ftdi"})
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{"sys": "ftdi"})
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self.comb += read_buffer.source.connect(read_fifo.sink)
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self.comb += read_buffer.source.connect(read_fifo.sink)
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# Write Fifo (SoC --> Ftdi)
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# Write Fifo (SoC --> Ftdi)
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write_fifo = RenameClockDomains(AsyncFIFO(phy_layout, fifo_depth),
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write_fifo = RenameClockDomains(AsyncFIFO(phy_layout, fifo_depth),
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{"write":"sys", "read":"ftdi"})
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{"write": "sys", "read": "ftdi"})
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self.submodules += read_fifo, read_buffer, write_fifo
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self.submodules += read_fifo, read_buffer, write_fifo
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