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https://github.com/enjoy-digital/litex.git
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Generate mem.h from SoC description
This commit is contained in:
parent
fce46ac0ca
commit
9e784fc82c
11 changed files with 46 additions and 25 deletions
6
make.py
6
make.py
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@ -138,6 +138,12 @@ Subtarget: {}
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""".format(platform_name, args.target, top_class.__name__)
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linker_header = cpuif.get_linker_regions(soc.cpu_memory_regions)
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write_to_file("software/include/generated/regions.ld", boilerplate + linker_header)
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try:
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flash_boot_address = soc.flash_boot_address
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except AttributeError:
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flash_boot_address = None
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mem_header = cpuif.get_mem_header(soc.cpu_memory_regions, flash_boot_address)
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write_to_file("software/include/generated/mem.h", boilerplate + mem_header)
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csr_header = cpuif.get_csr_header(soc.csr_base, soc.csrbankarray, soc.interrupt_map)
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write_to_file("software/include/generated/csr.h", boilerplate + csr_header)
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if hasattr(soc, "ddrphy"):
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@ -7,6 +7,15 @@ def get_linker_regions(regions):
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r += "}\n"
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return r
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def get_mem_header(regions, flash_boot_address):
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r = "#ifndef __GENERATED_MEM_H\n#define __GENERATED_MEM_H\n\n"
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for name, base, size in regions:
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r += "#define {name}_BASE 0x{base:08x}\n#define {name}_SIZE 0x{size:08x}\n\n".format(name=name.upper(), base=base, size=size)
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if flash_boot_address is not None:
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r += "#define FLASH_BOOT_ADDRESS 0x{:08x}\n\n".format(flash_boot_address)
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r += "#endif\n"
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return r
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def _get_rw_functions(reg_name, reg_base, size, read_only):
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r = ""
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@ -7,7 +7,7 @@
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#include <string.h>
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#include <irq.h>
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#include <hw/mem.h>
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#include <generated/mem.h>
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#include <generated/csr.h>
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#include <net/microudp.h>
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@ -241,6 +241,7 @@ void netboot(void)
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#endif
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#ifdef FLASH_BOOT_ADDRESS
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void flashboot(void)
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{
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unsigned int *flashbase;
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@ -249,7 +250,7 @@ void flashboot(void)
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unsigned int got_crc;
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printf("Booting from flash...\n");
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flashbase = (unsigned int *)FLASH_OFFSET_APP;
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flashbase = (unsigned int *)FLASH_BOOT_ADDRESS;
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length = *flashbase++;
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crc = *flashbase++;
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if((length < 32) || (length > 4*1024*1024)) {
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@ -266,3 +267,4 @@ void flashboot(void)
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}
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boot(0, 0, 0, SDRAM_BASE);
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}
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#endif
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@ -9,6 +9,7 @@
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#include <crc.h>
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#include <generated/csr.h>
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#include <generated/mem.h>
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#include <net/microudp.h>
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#include "sdram.h"
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@ -317,7 +318,9 @@ static void help(void)
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puts("netboot - boot via TFTP");
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#endif
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puts("serialboot - boot via SFL");
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#ifdef FLASH_BOOT_ADDRESS
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puts("flashboot - boot from flash");
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#endif
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puts("revision - display revision");
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}
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@ -349,7 +352,9 @@ static void do_command(char *c)
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else if(strcmp(token, "crc") == 0) crc(get_token(&c), get_token(&c));
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else if(strcmp(token, "flushl2") == 0) flush_l2_cache();
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#ifdef FLASH_BOOT_ADDRESS
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else if(strcmp(token, "flashboot") == 0) flashboot();
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#endif
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else if(strcmp(token, "serialboot") == 0) serialboot();
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#ifdef MINIMAC_BASE
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else if(strcmp(token, "netboot") == 0) netboot();
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@ -479,7 +484,9 @@ static int test_user_abort(void)
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static void boot_sequence(void)
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{
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if(test_user_abort()) {
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#ifdef FLASH_BOOT_ADDRESS
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flashboot();
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#endif
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serialboot();
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#ifdef MINIMAC_BASE
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netboot();
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@ -5,8 +5,8 @@
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#include <stdlib.h>
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#include <generated/sdram_phy.h>
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#include <generated/mem.h>
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#include <hw/flags.h>
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#include <hw/mem.h>
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#include "sdram.h"
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@ -1,17 +0,0 @@
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#ifndef __HW_MEM_H
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#define __HW_MEM_H
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/* TODO: those FLASH_ defines are platform-dependent, generate them from SoC description */
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#define FLASH_OFFSET_BITSTREAM 0x00000000 /* 1536k */
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#define FLASH_OFFSET_BIOS 0x00180000 /* 128k */
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#define FLASH_OFFSET_APP 0x001A0000 /* remaining space */
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#define FLASH_BLOCK_SIZE (128*1024)
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#define SDRAM_BASE 0x40000000
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#define MINIMAC_RX0_BASE 0xb0000000
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#define MINIMAC_RX1_BASE 0xb0000800
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#define MINIMAC_TX_BASE 0xb0001000
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#endif /* __HW_MEM_H */
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10
software/include/hw/minimac_mem.h
Normal file
10
software/include/hw/minimac_mem.h
Normal file
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@ -0,0 +1,10 @@
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#ifndef __HW_MINIMAC_MEM_H
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#define __HW_MINIMAC_MEM_H
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#include <generated/mem.h>
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#define MINIMAC_RX0_BASE MINIMAC_BASE
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#define MINIMAC_RX1_BASE (MINIMAC_BASE+0x0800)
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#define MINIMAC_TX_BASE (MINIMAC_BASE+0x1000)
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#endif
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@ -2,7 +2,7 @@
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#include <uart.h>
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#include <system.h>
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#include <hw/mem.h>
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#include <generated/mem.h>
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#include <generated/csr.h>
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void flush_cpu_icache(void)
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@ -5,7 +5,7 @@
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#include <system.h>
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#include <crc.h>
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#include <hw/flags.h>
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#include <hw/mem.h>
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#include <hw/minimac_mem.h>
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#include <net/microudp.h>
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@ -1,10 +1,11 @@
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#include <stdio.h>
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#include <string.h>
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#include <hw/mem.h>
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#include <generated/mem.h>
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#include "config.h"
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#define FLASH_OFFSET_CONFIG (FLASH_OFFSET_APP + FLASH_BLOCK_SIZE)
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#define FLASH_BLOCK_SIZE (128*1024)
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#define FLASH_OFFSET_CONFIG (FLASH_BOOT_ADDRESS + FLASH_BLOCK_SIZE)
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static volatile unsigned short *flash_config = (unsigned short *)(0x80000000 | FLASH_OFFSET_CONFIG);
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@ -74,9 +74,12 @@ class MiniSoC(SDRAMSoC):
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# Wishbone
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self.submodules.norflash = norflash16.NorFlash16(platform.request("norflash"),
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self.ns(110), self.ns(50))
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self.submodules.minimac = minimac3.MiniMAC(platform.request("eth"))
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self.flash_boot_address = 0x001a0000
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self.register_rom(self.norflash.bus)
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self.submodules.minimac = minimac3.MiniMAC(platform.request("eth"))
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self.add_wb_slave(lambda a: a[26:29] == 3, self.minimac.membus)
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self.add_cpu_memory_region("minimac_mem", 0xb0000000, 0x1800)
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# CSR
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self.submodules.crg = mxcrg.MXCRG(_MXClockPads(platform), self.clk_freq)
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