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move memtest to sdram
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2 changed files with 2 additions and 1 deletions
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@ -6,9 +6,10 @@ from migen.bank import csrgen
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from migen.bus import wishbone, csr, lasmibus, dfi
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from migen.bus import wishbone, csr, lasmibus, dfi
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from migen.bus import wishbone2lasmi, wishbone2csr
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from migen.bus import wishbone2lasmi, wishbone2csr
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from misoclib import lm32, mor1kx, uart, identifier, timer, memtest
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from misoclib import lm32, mor1kx, uart, identifier, timer
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from misoclib.sdram import lasmicon
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from misoclib.sdram import lasmicon
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from misoclib.sdram import dfii
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from misoclib.sdram import dfii
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from misoclib.sdram import memtest
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from misoclib.sdram.minicon import Minicon
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from misoclib.sdram.minicon import Minicon
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def mem_decoder(address, start=26, end=29):
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def mem_decoder(address, start=26, end=29):
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