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build/xilinx/common: Fix Ultrascale SDROutput/Input.

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This commit is contained in:
Andwer E Wilson 2021-08-21 12:03:57 -06:00 committed by Florent Kermarrec
parent 233f0fc5f4
commit 9f75c73d6b
1 changed files with 22 additions and 4 deletions
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26
litex/build/xilinx/common.py
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@ -366,18 +366,36 @@ class XilinxDDRInputUS:
# Ultrascale SDROutput -----------------------------------------------------------------------------
class XilinxSDROutputImplUS(Module):
def __init__(self, i, o, clk):
self.specials += Instance("FDCE",
i_C = clk,
i_CE = 1,
i_CLR = 0,
i_D = i,
o_Q = o
)
class XilinxSDROutputUS:
@staticmethod
def lower(dr):
return XilinxDDROutputImplUS(dr.i, dr.i, dr.o, dr.clk)
return XilinxSDROutputImplUS(dr.i, dr.o, dr.clk)
# Ultrascale SDRInput ------------------------------------------------------------------------------
class XilinxSDRInputImplUS(Module):
def __init__(self, i, o, clk):
self.specials += Instance("FDCE",
i_C = clk,
i_CE = 1,
i_CLR = 0,
i_D = i,
o_Q = o
)
class XilinxSDRInputUS:
@staticmethod
def lower(dr):
return XilinxDDRInputImplUS(dr.i, dr.o, Signal(), dr.clk)
return XilinxSDRInputImplUS(dr.i, dr.o, dr.clk)
# Ultrascale Specials Overrides --------------------------------------------------------------------