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fhdl/simplify/FullMemoryWE: fix WE slice for multi-port mems

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Sebastien Bourdeauducq 2013-12-13 00:02:50 +01:00
parent 3196462311
commit a20688f777
1 changed files with 1 additions and 1 deletions
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2
migen/fhdl/simplify.py
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@ -27,7 +27,7 @@ class FullMemoryWE(ModuleDecorator):
newport = _MemoryPort(adr=port.adr,
dat_r=port.dat_r[i*global_granularity:(i+1)*global_granularity] if port.dat_r is not None else None,
we=port.we[i*port_granularity//global_granularity] if port.we is not None else None,
we=port.we[i*global_granularity//port_granularity] if port.we is not None else None,
dat_w=port.dat_w[i*global_granularity:(i+1)*global_granularity] if port.dat_w is not None else None,
async_read=port.async_read,