soc/interconnect/stream: Add optional CSR to Multiplexer/Demultiplexer and Crossbar module with mux and demux.
This commit is contained in:
parent
2a19a61e05
commit
a350d2e909
|
@ -298,14 +298,16 @@ class ClockDomainCrossing(LiteXModule, DUID):
|
||||||
# Mux/Demux ----------------------------------------------------------------------------------------
|
# Mux/Demux ----------------------------------------------------------------------------------------
|
||||||
|
|
||||||
class Multiplexer(LiteXModule):
|
class Multiplexer(LiteXModule):
|
||||||
def __init__(self, layout, n):
|
def __init__(self, layout, n, with_csr=False):
|
||||||
self.source = Endpoint(layout)
|
self.source = Endpoint(layout)
|
||||||
sinks = []
|
sinks = []
|
||||||
for i in range(n):
|
for i in range(n):
|
||||||
sink = Endpoint(layout)
|
sink = Endpoint(layout)
|
||||||
setattr(self, "sink"+str(i), sink)
|
setattr(self, f"sink{i}", sink)
|
||||||
sinks.append(sink)
|
sinks.append(sink)
|
||||||
self.sel = Signal(max=max(n, 2))
|
self.sel = Signal(max=max(n, 2))
|
||||||
|
if with_csr:
|
||||||
|
self.add_csr()
|
||||||
|
|
||||||
# # #
|
# # #
|
||||||
|
|
||||||
|
@ -314,16 +316,21 @@ class Multiplexer(LiteXModule):
|
||||||
cases[i] = sink.connect(self.source)
|
cases[i] = sink.connect(self.source)
|
||||||
self.comb += Case(self.sel, cases)
|
self.comb += Case(self.sel, cases)
|
||||||
|
|
||||||
|
def add_csr(self, sel_default=0):
|
||||||
|
self._sel = CSRStorage(len(self.sel), reset=sel_default)
|
||||||
|
self.comb += self.sel.eq(self._sel.storage)
|
||||||
|
|
||||||
class Demultiplexer(LiteXModule):
|
class Demultiplexer(LiteXModule):
|
||||||
def __init__(self, layout, n):
|
def __init__(self, layout, n, with_csr=False):
|
||||||
self.sink = Endpoint(layout)
|
self.sink = Endpoint(layout)
|
||||||
sources = []
|
sources = []
|
||||||
for i in range(n):
|
for i in range(n):
|
||||||
source = Endpoint(layout)
|
source = Endpoint(layout)
|
||||||
setattr(self, "source"+str(i), source)
|
setattr(self, f"source{i}", source)
|
||||||
sources.append(source)
|
sources.append(source)
|
||||||
self.sel = Signal(max=max(n, 2))
|
self.sel = Signal(max=max(n, 2))
|
||||||
|
if with_csr:
|
||||||
|
self.add_csr()
|
||||||
|
|
||||||
# # #
|
# # #
|
||||||
|
|
||||||
|
@ -332,6 +339,14 @@ class Demultiplexer(LiteXModule):
|
||||||
cases[i] = self.sink.connect(source)
|
cases[i] = self.sink.connect(source)
|
||||||
self.comb += Case(self.sel, cases)
|
self.comb += Case(self.sel, cases)
|
||||||
|
|
||||||
|
def add_csr(self, sel_default=0):
|
||||||
|
self._sel = CSRStorage(len(self.sel), reset=sel_default)
|
||||||
|
self.comb += self.sel.eq(self._sel.storage)
|
||||||
|
|
||||||
|
class Crossbar(LiteXModule):
|
||||||
|
def __init__(self, layout, n, with_csr=False):
|
||||||
|
self.mux = Multiplexer( layout, n, with_csr)
|
||||||
|
self.demux = Demultiplexer(layout, n, with_csr)
|
||||||
|
|
||||||
# Gate ---------------------------------------------------------------------------------------------
|
# Gate ---------------------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue