.gitmodules: use our copy of tapcfg since https://github.com/nizox/tapcfg no longer exists.
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@ -12,7 +12,7 @@
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url = https://github.com/cliffordwolf/picorv32
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url = https://github.com/cliffordwolf/picorv32
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[submodule "litex/build/sim/core/modules/ethernet/tapcfg"]
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[submodule "litex/build/sim/core/modules/ethernet/tapcfg"]
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path = litex/build/sim/core/modules/ethernet/tapcfg
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path = litex/build/sim/core/modules/ethernet/tapcfg
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url = https://github.com/nizox/tapcfg
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url = https://github.com/enjoy-digital/tapcfg
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[submodule "litex/soc/cores/cpu/vexriscv/verilog"]
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[submodule "litex/soc/cores/cpu/vexriscv/verilog"]
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path = litex/soc/cores/cpu/vexriscv/verilog
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path = litex/soc/cores/cpu/vexriscv/verilog
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url = https://github.com/m-labs/VexRiscv-verilog.git
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url = https://github.com/m-labs/VexRiscv-verilog.git
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