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update README

This commit is contained in:
Florent Kermarrec 2012-09-16 11:51:03 +02:00
parent d97a640b53
commit a7658cdc6c
1 changed files with 3 additions and 5 deletions
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@ -14,14 +14,12 @@ Simulation:
-tb_MigScope : Global Test with Csr : [Ok]
Example Design:
-de0_nano : Generate Signals in FPGA and probe them with migScope : [Wip]
-de0_nano : Generate Signals in FPGA and probe them with migScope : [Ok]
Toolchain [Ok]
-de1 : Generate Signals in FPGA and probe them with migScope : [Wip]
-de1 : Generate Signals in FPGA and probe them with migScope : [Ok]
Toolchain [Ok]
- test_MigIo : Led & Switch Test controlled by Python [Ok]
- test_MigLa : Logic Analyzer controlled by Python [Wip]
(Still some glitches in received Data, let's use
migScope to debug itself :))
- test_MigLa : Logic Analyzer controlled by Python [Ok]
[> Contact
E-mail: florent@enjoy-digital.fr