build/xilinx/vivado: only set library for vhdl files (not supported for verilog/system-verilog)
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# This file is Copyright (c) 2014 Florent Kermarrec <florent@enjoy-digital.fr>
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# This file is Copyright (c) 2014-2019 Florent Kermarrec <florent@enjoy-digital.fr>
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# License: BSD
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import os
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@ -118,8 +118,9 @@ class XilinxVivadoToolchain:
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for filename, language, library in sources:
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filename_tcl = "{" + filename + "}"
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tcl.append("add_files " + filename_tcl)
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tcl.append("set_property library {} [get_files {}]"
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.format(library, filename_tcl))
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if language == "vhdl":
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tcl.append("set_property library {} [get_files {}]"
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.format(library, filename_tcl))
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for filename in edifs:
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filename_tcl = "{" + filename + "}"
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tcl.append("read_edif " + filename_tcl)
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