build: efinix: EfinixTristateImpl: use GPIO Bus
use the gpio bus for Efinix Tristate implemenation. Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
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@ -134,27 +134,31 @@ class EfinixClkOutput(Module):
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class EfinixTristateImpl(Module):
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class EfinixTristateImpl(Module):
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def __init__(self, io, o, oe, i=None):
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def __init__(self, io, o, oe, i=None):
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platform = LiteXContext.platform
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platform = LiteXContext.platform
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nbits, sign = value_bits_sign(io)
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if len(io) == 1:
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io_name = platform.get_pin_name(io)
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for bit in range(nbits):
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io_pad = platform.get_pin_location(io)
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io_name = platform.get_pin_name(io[bit])
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io_prop = platform.get_pin_properties(io)
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io_loc = platform.get_pin_location(io[bit])
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else:
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io_prop = platform.get_pin_properties(io[bit])
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io_name = platform.get_pins_name(io)
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io_o = platform.add_iface_io(io_name + "_OUT")
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io_pad = platform.get_pins_location(io)
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io_oe = platform.add_iface_io(io_name + "_OE")
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io_prop = platform.get_pin_properties(io[0])
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io_i = platform.add_iface_io(io_name + "_IN")
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io_prop_dict = dict(io_prop)
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self.comb += io_o.eq(o >> bit)
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io_data_i = platform.add_iface_io(io_name + "_OUT")
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self.comb += io_oe.eq(oe)
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io_data_o = platform.add_iface_io(io_name + "_IN")
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io_data_e = platform.add_iface_io(io_name + "_OE")
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self.comb += io_data_i.eq(o)
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self.comb += io_data_e.eq(oe)
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if i is not None:
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if i is not None:
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self.comb += i[bit].eq(io_i)
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self.comb += i.eq(io_data_o)
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block = {
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block = {
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"type" : "GPIO",
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"type" : "GPIO",
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"mode" : "INOUT",
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"mode" : "INOUT",
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"name" : io_name,
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"name" : io_name,
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"location" : [io_loc[0]],
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"location" : io_pad,
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"properties" : io_prop
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"properties" : io_prop,
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"size" : len(io),
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"drive_strength" : io_prop_dict.get("DRIVE_STRENGTH", "4")
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}
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}
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platform.toolchain.ifacewriter.blocks.append(block)
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platform.toolchain.ifacewriter.blocks.append(block)
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platform.toolchain.excluded_ios.append(platform.get_pin(io))
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platform.toolchain.excluded_ios.append(platform.get_pin(io))
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