cores/video/add_video_framebuffer: Add workaround when SDRAM data_width < 32.
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@ -599,6 +599,10 @@ class VideoFrameBuffer(Module, AutoCSR):
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# Video CDC.
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self.submodules.cdc = stream.ClockDomainCrossing([("data", 32)], cd_from="sys", cd_to=clock_domain)
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self.comb += self.conv.source.connect(self.cdc.sink)
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self.comb += If(dram_port.data_width < 32, # FIXME.
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self.cdc.sink.data[ 0: 8].eq(self.conv.source.data[16:24]),
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self.cdc.sink.data[16:24].eq(self.conv.source.data[ 0: 8]),
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)
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# Video Generation.
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self.comb += [
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