build/efinix/common.py: ClkInput: added ClockSignal support
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@ -66,19 +66,34 @@ class EfinixAsyncResetSynchronizer:
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# Efinix Clk Input ---------------------------------------------------------------------------------
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class EfinixClkInputImpl(Module):
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n = 0
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def __init__(self, platform, i, o):
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o_clk = platform.add_iface_io(o) # FIXME.
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self.name = f"clk_input{self.n}"
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if isinstance(o, Signal):
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clk_out_name = f"{o.name_override}{self.name}_clk"
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platform.add_extension([(clk_out_name, 0, Pins(1))])
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platform.toolchain.excluded_ios.append(clk_out_name)
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clk_out = platform.request(clk_out_name)
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platform.clks[o.name_override] = clk_out_name
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else:
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clk_out = platform.add_iface_io(o) # FIXME.
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clk_out_name = platform.get_pin_name(clk_out)
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block = {
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"type" : "GPIO",
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"size" : 1,
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"location" : platform.get_pin_location(i)[0],
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"properties" : platform.get_pin_properties(i),
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"name" : platform.get_pin_name(o_clk),
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"name" : clk_out_name,
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"mode" : "INPUT_CLK",
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}
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platform.toolchain.ifacewriter.blocks.append(block)
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platform.toolchain.excluded_ios.append(i)
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if isinstance(o, Signal):
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self.comb += o.eq(clk_out)
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o = clk_out
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EfinixClkInputImpl.n += 1 # FIXME: Improve.
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class EfinixClkInput(Module):
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@staticmethod
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