doc: remove IP

This commit is contained in:
Florent Kermarrec 2015-02-21 23:33:21 +01:00
parent 65294a5577
commit acdf511bd1
2 changed files with 2 additions and 2 deletions

2
README
View File

@ -20,7 +20,7 @@ PDF : www.enjoy-digital.fr/litex/liteeth.pdf
LiteEth provides a small footprint and configurable Ethernet core. LiteEth provides a small footprint and configurable Ethernet core.
LiteEth is part of LiteX libraries whose aims are to lower entry level of LiteEth is part of LiteX libraries whose aims are to lower entry level of
complex FPGA IP cores by providing simple, elegant and efficient implementations complex FPGA cores by providing simple, elegant and efficient implementations
ofcomponents used in today's SoC such as Ethernet, SATA, PCIe, SDRAM Controller... ofcomponents used in today's SoC such as Ethernet, SATA, PCIe, SDRAM Controller...
The core uses simple and specific streaming buses and will provides in the future The core uses simple and specific streaming buses and will provides in the future

View File

@ -7,7 +7,7 @@ About LiteEth
LiteEth provides a small footprint and configurable Ethernet core. LiteEth provides a small footprint and configurable Ethernet core.
LiteEth is part of LiteX libraries whose aims are to lower entry level of LiteEth is part of LiteX libraries whose aims are to lower entry level of
complex FPGA IP cores by providing simple, elegant and efficient implementations complex FPGA cores by providing simple, elegant and efficient implementations
ofcomponents used in today's SoC such as Ethernet, SATA, PCIe, SDRAM Controller... ofcomponents used in today's SoC such as Ethernet, SATA, PCIe, SDRAM Controller...
The core uses simple and specific streaming buses and will provides in the future The core uses simple and specific streaming buses and will provides in the future