Allow SoCCore instances to set maximum interrupt number
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@ -7,6 +7,7 @@
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# This file is Copyright (c) 2019 Gabriel L. Somlo <gsomlo@gmail.com>
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# This file is Copyright (c) 2019 Gabriel L. Somlo <gsomlo@gmail.com>
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# This file is Copyright (c) 2019 Ilia Sergachev <ilia.sergachev@protonmail.ch>
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# This file is Copyright (c) 2019 Ilia Sergachev <ilia.sergachev@protonmail.ch>
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# This file is Copyright (c) 2018 Jean-François Nguyen <jf@lambdaconcept.fr>
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# This file is Copyright (c) 2018 Jean-François Nguyen <jf@lambdaconcept.fr>
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# This file is Copyright (c) 2020 Raptor Engineering, LLC <sales@raptorengineering.com>
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# This file is Copyright (c) 2015 Robert Jordens <jordens@gmail.com>
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# This file is Copyright (c) 2015 Robert Jordens <jordens@gmail.com>
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# This file is Copyright (c) 2018 Sean Cross <sean@xobs.io>
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# This file is Copyright (c) 2018 Sean Cross <sean@xobs.io>
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# This file is Copyright (c) 2018 Stafford Horne <shorne@gmail.com>
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# This file is Copyright (c) 2018 Stafford Horne <shorne@gmail.com>
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@ -84,6 +85,8 @@ class SoCCore(LiteXSoC):
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csr_address_width = 14,
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csr_address_width = 14,
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csr_paging = 0x800,
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csr_paging = 0x800,
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csr_ordering = "big",
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csr_ordering = "big",
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# Interrupt parameters
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irq_n_irqs = 32,
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# Identifier parameters
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# Identifier parameters
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ident = "",
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ident = "",
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ident_version = False,
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ident_version = False,
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@ -114,7 +117,7 @@ class SoCCore(LiteXSoC):
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csr_ordering = csr_ordering,
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csr_ordering = csr_ordering,
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csr_reserved_csrs = self.csr_map,
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csr_reserved_csrs = self.csr_map,
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irq_n_irqs = 32,
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irq_n_irqs = irq_n_irqs,
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irq_reserved_irqs = {},
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irq_reserved_irqs = {},
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)
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)
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