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minor fixes

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This commit is contained in:
Sebastien Bourdeauducq 2015-09-29 10:19:00 +08:00
parent 523377efbe
commit b1a90053f5
2 changed files with 3 additions and 3 deletions
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2
misoc/integration/builder.py
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@ -88,7 +88,7 @@ class Builder:
subprocess.check_call(["make", "-C", dst_dir]) subprocess.check_call(["make", "-C", dst_dir])
def _initialize_rom(self): def _initialize_rom(self):
bios_file = os.path.join(self.output_dir, "software" "bios", bios_file = os.path.join(self.output_dir, "software", "bios",
"bios.bin") "bios.bin")
if self.soc.integrated_rom_size: if self.soc.integrated_rom_size:
with open(bios_file, "rb") as boot_file: with open(bios_file, "rb") as boot_file:

4
misoc/interconnect/wishbone2csr.py
View file

@ -1,7 +1,7 @@
from migen import * from migen import *
from migen.genlib.misc import timeline from migen.genlib.misc import timeline
from misoc.interconnect import csr, wishbone from misoc.interconnect import csr_bus, wishbone
class WB2CSR(Module): class WB2CSR(Module):
@ -10,7 +10,7 @@ class WB2CSR(Module):
bus_wishbone = wishbone.Interface() bus_wishbone = wishbone.Interface()
self.wishbone = bus_wishbone self.wishbone = bus_wishbone
if bus_csr is None: if bus_csr is None:
bus_csr = csr.Interface() bus_csr = csr_bus.Interface()
self.csr = bus_csr self.csr = bus_csr
### ###