CHANGES.md: Update.
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CHANGES.md
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CHANGES.md
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- soc : Fixed parameters propagation for AXI data-width conversion (#1997).
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- soc/cores/clock/colognechip : Fixed and reworked locked signal handling.
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- litesdcard : Fixed data_i sampling (https://github.com/enjoy-digital/litesdcard/pull/34).
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- litespi/mmap : Fixed dummy bits (https://github.com/litex-hub/litespi/pull/71).
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[> Added
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- liteeth/mac : Improved broadcast filtering logic in Hybrid Mode (https://github.com/enjoy-digital/liteeth/pull/165).
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- soc/cores/hyperbus : Rewritten HyperRAM core to enhance performance and add new features (#2053).
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- litedram : Added bank_byte_alignement parameter for improvded address mapping (https://github.com/enjoy-digital/litedram/pull/360).
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- build/efinix : Added support for more primitives and improved clocking support. (#2060, #2075).
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- software/bios : Added spiram support (#2058).
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- liteeth/etherbone : Added 64-bit support to Etherbone.
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- liteeth/liteeth_gen : Added XGMII support (PHY handled externally).
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- soc/interconnect/stream : Added optional CSR to Multiplexer/Demultiplexer and Crossbar module.
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- tools/litex_json2dts_zephyr : Improved support/update ((#1974).
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- soc/cores/jtag : Added Spartan7 support (#2076).
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- liteeth/phy : Added 1000BASEX support for Virtex7 (https://github.com/enjoy-digital/liteeth/pull/171).
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- liteeth/phy : Improved RGMII support on Efinix Titanium/Trion (https://github.com/enjoy-digital/liteeth/pull/168).
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- liteiclink/serdes : Added GTH/Virtex7 support (https://github.com/enjoy-digital/liteeth/pull/23).
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- litespi/phy : Improved logic and cleanup (https://github.com/litex-hub/litespi/pull/73).
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- litespi/mmap : Added write support for SPIRAM devices (https://github.com/litex-hub/litespi/pull/70).
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[> Changed
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----------
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