liteXXX cores: remove setup.py and relative paths (we will install misolib of use PYTHON_PATH)
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@ -10,7 +10,6 @@ from migen.bank.description import CSRStatus
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from mibuild import tools
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from mibuild import tools
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from mibuild.xilinx.common import *
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from mibuild.xilinx.common import *
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sys.path.append("../../../../") # Temporary
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from misoclib.soc import cpuif
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from misoclib.soc import cpuif
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from misoclib.com.liteeth.common import *
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from misoclib.com.liteeth.common import *
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@ -1,37 +0,0 @@
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#!/usr/bin/env python3
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import sys, os
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from setuptools import setup
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from setuptools import find_packages
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here = os.path.abspath(os.path.dirname(__file__))
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README = open(os.path.join(here, "README")).read()
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required_version = (3, 3)
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if sys.version_info < required_version:
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raise SystemExit("LiteEth requires python {0} or greater".format(
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".".join(map(str, required_version))))
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setup(
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name="liteeth",
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version="unknown",
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description="small footprint and configurable Ethernet core",
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long_description=README,
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author="Florent Kermarrec",
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author_email="florent@enjoy-digital.fr",
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url="http://enjoy-digital.fr",
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download_url="https://github.com/enjoy-digital/liteeth",
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packages=find_packages(here),
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license="GPL",
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platforms=["Any"],
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keywords="HDL ASIC FPGA hardware design",
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classifiers=[
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"Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)",
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"Environment :: Console",
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"Development Status :: Alpha",
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"Intended Audience :: Developers",
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"License :: OSI Approved :: GNU General Public License (GPL)",
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"Operating System :: OS Independent",
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"Programming Language :: Python",
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],
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)
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@ -10,7 +10,6 @@ from migen.bank.description import CSRStatus
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from mibuild import tools
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from mibuild import tools
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from mibuild.xilinx.common import *
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from mibuild.xilinx.common import *
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sys.path.append("../../../../") # Temporary
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from misoclib.soc import cpuif
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from misoclib.soc import cpuif
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from misoclib.mem.litesata.common import *
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from misoclib.mem.litesata.common import *
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@ -1,37 +0,0 @@
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#!/usr/bin/env python3
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import sys, os
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from setuptools import setup
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from setuptools import find_packages
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here = os.path.abspath(os.path.dirname(__file__))
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README = open(os.path.join(here, "README")).read()
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required_version = (3, 3)
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if sys.version_info < required_version:
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raise SystemExit("LiteSATA requires python {0} or greater".format(
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".".join(map(str, required_version))))
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setup(
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name="litesata",
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version="unknown",
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description="small footprint and configurable SATA gen1/2/3 core",
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long_description=README,
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author="Florent Kermarrec",
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author_email="florent@enjoy-digital.fr",
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url="http://enjoy-digital.fr",
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download_url="https://github.com/enjoy-digital/litesata",
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packages=find_packages(here),
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license="GPL",
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platforms=["Any"],
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keywords="HDL ASIC FPGA hardware design",
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classifiers=[
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"Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)",
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"Environment :: Console",
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"Development Status :: Alpha",
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"Intended Audience :: Developers",
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"License :: OSI Approved :: GNU General Public License (GPL)",
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"Operating System :: OS Independent",
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"Programming Language :: Python",
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],
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)
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@ -10,7 +10,6 @@ from migen.bank.description import CSRStatus
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from mibuild import tools
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from mibuild import tools
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from mibuild.xilinx.common import *
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from mibuild.xilinx.common import *
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sys.path.append("../../../../") # Temporary
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from misoclib.soc import cpuif
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from misoclib.soc import cpuif
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from misoclib.tools.litescope.common import *
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from misoclib.tools.litescope.common import *
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@ -1,37 +0,0 @@
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#!/usr/bin/env python3
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import sys, os
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from setuptools import setup
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from setuptools import find_packages
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here = os.path.abspath(os.path.dirname(__file__))
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README = open(os.path.join(here, "README")).read()
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required_version = (3, 3)
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if sys.version_info < required_version:
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raise SystemExit("LiteScope requires python {0} or greater".format(
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".".join(map(str, required_version))))
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setup(
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name="litescope",
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version="unknown",
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description="small footprint and configurable embedded FPGA logic analyzer",
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long_description=README,
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author="Florent Kermarrec",
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author_email="florent@enjoy-digital.fr",
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url="http://enjoy-digital.fr",
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download_url="https://github.com/Florent-Kermarrec/litescope",
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packages=find_packages(here),
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license="GPL",
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platforms=["Any"],
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keywords="HDL ASIC FPGA hardware design",
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classifiers=[
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"Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)",
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"Environment :: Console",
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"Development Status :: Alpha",
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"Intended Audience :: Developers",
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"License :: OSI Approved :: GNU General Public License (GPL)",
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"Operating System :: OS Independent",
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"Programming Language :: Python",
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],
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)
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