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build: efinix: implement QDR input, output and tristade.
implement QDR input, output and tristade for the titanium. Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
This commit is contained in:
Fin Maaß
parent
68d5e590dd
commit
b4c4e890e5
2 changed files with 138 additions and 0 deletions
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@ -422,6 +422,130 @@ class EfinixDDRInput:
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def lower(dr):
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return EfinixDDRInputImpl(dr.platform, dr.i, dr.o1, dr.o2, dr.clk)
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# Efinix QDROutput ---------------------------------------------------------------------------------
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class EfinixQDROutputImpl(Module):
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def __init__(self, platform, i1, i2, i3, i4, o, clk, fastclk):
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assert fastclk is not None
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io_name = platform.get_pin_name(o)
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io_pad = platform.get_pin_location(o)
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io_prop = platform.get_pin_properties(o)
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io_prop_dict = dict(io_prop)
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io_data = platform.add_iface_io(io_name, 4)
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self.comb += io_data[0].eq(i1)
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self.comb += io_data[1].eq(i2)
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self.comb += io_data[2].eq(i3)
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self.comb += io_data[3].eq(i4)
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block = {
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"type" : "GPIO",
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"mode" : "OUTPUT",
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"name" : io_name,
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"location" : io_pad,
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"properties" : io_prop,
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"size" : 1,
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"out_reg" : "SERIAL",
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"out_clk_pin" : clk.name_override, # FIXME.
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"outfastclk_pin" : fastclk.name_override, # FIXME.
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"is_inclk_inverted" : False,
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"drive_strength" : io_prop_dict.get("DRIVE_STRENGTH", "4")
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}
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platform.toolchain.ifacewriter.blocks.append(block)
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platform.toolchain.excluded_ios.append(platform.get_pin(o))
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class EfinixQDROutput:
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@staticmethod
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def lower(dr):
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if dr.platform.family == "Trion":
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raise NotImplementedError("Attempted to use a QDR output, but platform does not support them")
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return EfinixQDROutputImpl(dr.platform, dr.i1, dr.i2, dr.i3, dr.i4, dr.o, dr.clk, dr.fastclk)
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# Efinix QDRInput ----------------------------------------------------------------------------------
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class EfinixQDRInputImpl(Module):
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def __init__(self, platform, i, o1, o2, o3, o4, clk, fastclk):
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assert fastclk is not None
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io_name = platform.get_pin_name(i)
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io_pad = platform.get_pin_location(i)
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io_prop = platform.get_pin_properties(i)
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io_data = platform.add_iface_io(io_name, 4)
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self.comb += o1.eq(io_data[0])
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self.comb += o2.eq(io_data[1])
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self.comb += o3.eq(io_data[2])
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self.comb += o4.eq(io_data[3])
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block = {
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"type" : "GPIO",
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"mode" : "INPUT",
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"name" : io_name,
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"location" : io_pad,
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"properties" : io_prop,
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"size" : 1,
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"in_reg" : "SERIAL",
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"in_clk_pin" : clk.name_override, # FIXME.
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"infastclk_pin" : fastclk.name_override, # FIXME.
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"is_inclk_inverted" : False,
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}
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platform.toolchain.ifacewriter.blocks.append(block)
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platform.toolchain.excluded_ios.append(platform.get_pin(i))
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class EfinixQDRInput:
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@staticmethod
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def lower(dr):
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if dr.platform.family == "Trion":
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raise NotImplementedError("Attempted to use a QDR input, but platform does not support them")
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return EfinixQDRInputImpl(dr.platform, dr.i, dr.o1, dr.o2, dr.o3, dr.o4, dr.clk, dr.fastclk)
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# Efinix QDRTristate ---------------------------------------------------------------------------------
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class EfinixQDRTristateImpl(Module):
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def __init__(self, platform, io, o1, o2, o3, o4, oe, i1, i2, i3, i4, clk, fastclk_in, fastclk_out):
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assert fastclk_in is not None
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assert fastclk_out is not None
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io_name = platform.get_pin_name(io)
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io_pad = platform.get_pin_location(io)
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io_prop = platform.get_pin_properties(io)
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io_prop_dict = dict(io_prop)
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io_data_i = platform.add_iface_io(io_name + "_OUT", 4)
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io_data_o = platform.add_iface_io(io_name + "_IN", 4)
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io_data_e = platform.add_iface_io(io_name + "_OE")
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self.comb += io_data_i[0].eq(o1)
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self.comb += io_data_i[1].eq(o2)
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self.comb += io_data_i[2].eq(o3)
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self.comb += io_data_i[3].eq(o4)
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self.comb += io_data_e.eq(oe)
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self.comb += i1.eq(io_data_o[0])
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self.comb += i2.eq(io_data_o[1])
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self.comb += i3.eq(io_data_o[2])
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self.comb += i4.eq(io_data_o[3])
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block = {
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"type" : "GPIO",
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"mode" : "INOUT",
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"name" : io_name,
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"location" : io_pad,
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"properties" : io_prop,
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"size" : 1,
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"in_reg" : "SERIAL",
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"in_clk_pin" : clk.name_override, # FIXME.
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"infastclk_pin" : fastclk_in.name_override, # FIXME.
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"out_reg" : "SERIAL",
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"out_clk_pin" : clk.name_override, # FIXME.
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"outfastclk_pin" : fastclk_out.name_override, # FIXME.
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"oe_reg" : "REG",
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"is_inclk_inverted" : False,
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"drive_strength" : io_prop_dict.get("DRIVE_STRENGTH", "4")
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}
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platform.toolchain.ifacewriter.blocks.append(block)
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platform.toolchain.excluded_ios.append(platform.get_pin(io))
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class EfinixQDRTristate:
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@staticmethod
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def lower(dr):
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assert dr.oe2 is None
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assert dr.oe3 is None
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assert dr.oe4 is None
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if dr.platform.family == "Trion":
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raise NotImplementedError("Attempted to use a QDR tristate, but platform does not support them")
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return EfinixQDRTristateImpl(dr.platform, dr.io, dr.o1, dr.o2, dr.o3, dr.o4, dr.oe1, dr.i1, dr.i2, dr.i3, dr.i4, dr.clk, dr.fastclk_in, dr.fastclk_out)
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# Efinix Special Overrides -------------------------------------------------------------------------
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efinix_special_overrides = {
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@ -436,4 +560,7 @@ efinix_special_overrides = {
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DDROutput : EfinixDDROutput,
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DDRInput : EfinixDDRInput,
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DDRTristate : EfinixDDRTristate,
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QDRInput : EfinixQDRInput,
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QDROutput : EfinixQDROutput,
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QDRTristate : EfinixQDRTristate,
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}
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@ -174,6 +174,9 @@ design.create("{2}", "{3}", "./../gateware", overwrite=True)
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if "out_delay" in block:
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cmd += f'design.set_property("{name}","OUTDELAY","{block["out_delay"]}")\n'
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if "outfastclk_pin" in block:
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cmd += 'design.set_property("{}","OUTFASTCLK_PIN","{}")\n'.format(name, block["outfastclk_pin"])
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if "out_clk_inv" in block:
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cmd += f'design.set_property("{name}","IS_OUTCLK_INVERTED","{block["out_clk_inv"]}")\n'
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cmd += f'design.set_property("{name}","OE_CLK_PIN_INV","{block["out_clk_inv"]}")\n'
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@ -184,6 +187,9 @@ design.create("{2}", "{3}", "./../gateware", overwrite=True)
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if "in_delay" in block:
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cmd += f'design.set_property("{name}","INDELAY","{block["in_delay"]}")\n'
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if "infastclk_pin" in block:
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cmd += 'design.set_property("{}","INFASTCLK_PIN","{}")\n'.format(name, block["infastclk_pin"])
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if "in_clk_inv" in block:
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cmd += f'design.set_property("{name}","IS_INCLK_INVERTED","{block["in_clk_inv"]}")\n'
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@ -216,6 +222,8 @@ design.create("{2}", "{3}", "./../gateware", overwrite=True)
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cmd += f'design.set_property("{name}","IN_CLK_PIN","{block["in_clk_pin"]}")\n'
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if "in_delay" in block:
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cmd += f'design.set_property("{name}","INDELAY","{block["in_delay"]}")\n'
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if "infastclk_pin" in block:
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cmd += 'design.set_property("{}","INFASTCLK_PIN","{}")\n'.format(name, block["infastclk_pin"])
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if prop:
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for p, val in prop:
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cmd += 'design.set_property("{}","{}","{}")\n'.format(name, p, val)
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@ -237,6 +245,9 @@ design.create("{2}", "{3}", "./../gateware", overwrite=True)
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if "out_delay" in block:
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cmd += 'design.set_property("{}","OUTDELAY","{}")\n'.format(name, block["out_delay"])
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if "outfastclk_pin" in block:
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cmd += 'design.set_property("{}","OUTFASTCLK_PIN","{}")\n'.format(name, block["outfastclk_pin"])
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if "out_clk_inv" in block:
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cmd += f'design.set_property("{name}","IS_OUTCLK_INVERTED","{block["out_clk_inv"]}")\n'
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cmd += f'design.set_property("{name}","OE_CLK_PIN_INV","{block["out_clk_inv"]}")\n'
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