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integration/soc/add_uart: add USB CDC support (with ValentyUSB core).

This commit is contained in:
Florent Kermarrec 2020-03-25 19:07:06 +01:00
parent 76872a7afb
commit b509df8bb6
1 changed files with 8 additions and 0 deletions
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8
litex/soc/integration/soc.py
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@ -954,6 +954,14 @@ class LiteXSoC(SoC):
tx_fifo_depth = fifo_depth, tx_fifo_depth = fifo_depth,
rx_fifo_depth = fifo_depth)) rx_fifo_depth = fifo_depth))
# USB CDC (with ValentyUSB core)
elif name in ["usb_cdc"]:
import valentyusb.usbcore.io as usbio
import valentyusb.usbcore.cpu.cdc_eptri as cdc_eptri
usb_pads = self.platform.request("usb")
usb_iobuf = usbio.IoBuf(usb_pads.d_p, usb_pads.d_n, usb_pads.pullup)
self.submodules.uart = cdc_eptri.CDCUsb(usb_iobuf)
# Classic UART # Classic UART
else: else:
self.submodules.uart_phy = uart.UARTPHY( self.submodules.uart_phy = uart.UARTPHY(